Abstract: The present invention provides a pharmaceutical composition for cancer treatment comprising an antibody against CCR8.

Abstract: An internal frame signal producing circuit for use in a cross connection system which cross connects first bit rate signals, each produced by multiplexing m second bit rate signals at first or the second bit rate signal levels, the first bit rate being higher than the second bit rate, an internal frame frequency is predetermined to be equal to a frequency f.sub.h ' higher than a first nominal frequency f.sub.h of the first bit rate digital signals by a predetermined value, the frequency f.sub.h ' being synchronized with a second nominal frequency fl of the second bit rate digital signals. In order to obtain the internal frame signal, from m second bit rate signals, the m second bit rate signals are stuff-synchronized processed to produce m stuff-synchronized signals, each having a stuff bit, a variable bit, and vacant bit at suitable bit intervals in a frame of a frame length. The m stuffed-synchronized signals are serially arranged to make the internal frame signal.

Abstract: In a cross-connection network, a plurality of asynchronous input digital signals can be cross-connected to a plurality of output lines by use of time switch. The input digital signals are pulse stuffed at a common higher bit rate and are synchronized to one another by attaching extra bits. The pulse stuffed signals are assigned into serial frames in a predetermined order by the multiplex technique and are interchanged from one to another by the time switch in the time division fashion. The frame-interchanged signal is demultiplexed to reproduce the pulse-stuffed signals which are sent out to the respective output lines assigned to the frames after removing extra bits. When the input digital signals are of higher order group, each of the higher order group digital signals is demultiplexed to lower order group signals which are pulse stuffed to be synchronized to the common higher bit rate.

Abstract: In a recursive digital filter for dealing with data words given by two's complement representation in a common word format comprising a sign bit, an integer bit, and a predetermined number of fractional bits, an overflow detect and correct circuit is supplied with simultaneously produced sign bits of bit-serial first sum, feedback, and second sum data words and with the integer bit of the second sum data word and detects overflow in the second sum data word to produce, for use in the circuit, an overflow detect pulse indicative of presence or absence of overflow. In either event, the circuit produces an overflow-free data word for use in the filter. When overflow is detected, the circuit produces a polarity decision pulse that decides polarities of the overflow-free bits. Otherwise, the circuit determines the overflow-free bits directly by the corresponding bits of the second sum data word.