Patents by Inventor Hisashi Terashita

Hisashi Terashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9003889
    Abstract: A resonant pressure sensor including one or more resonant-type strain gauges arranged on a diaphragm may include a sensor substrate made of silicon and including one surface on which one or more resonant-type strain gauge elements are arranged and the other surface which is polished to have a thickness corresponding to the diaphragm, a base substrate made of silicon and including one surface directly bonded with the other surface of the sensor substrate, a concave portion formed in a portion of the base substrate bonding with the sensor substrate, substantially forming the diaphragm in the sensor substrate, and including a predetermined gap that does not restrict a movable range of the diaphragm due to foreign substances and suppresses vibration of the diaphragm excited by vibration of the resonant-type strain gauge elements, one or more conducting holes, and a fluid.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: April 14, 2015
    Assignee: Yokogawa Electric Corporation
    Inventors: Yuusaku Yoshida, Takashi Yoshida, Hiroshi Suzuki, Shuhei Yoshita, Hisashi Terashita
  • Publication number: 20130047734
    Abstract: A resonant pressure sensor including one or more resonant-type strain gauges arranged on a diaphragm may include a sensor substrate made of silicon and including one surface on which one or more resonant-type strain gauge elements are arranged and the other surface which is polished to have a thickness corresponding to the diaphragm, a base substrate made of silicon and including one surface directly bonded with the other surface of the sensor substrate, a concave portion formed in a portion of the base substrate bonding with the sensor substrate, substantially forming the diaphragm in the sensor substrate, and including a predetermined gap that does not restrict a movable range of the diaphragm due to foreign substances and suppresses vibration of the diaphragm excited by vibration of the resonant-type strain gauge elements, one or more conducting holes, and a fluid.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 28, 2013
    Applicant: YOKOGAWA ELECTRIC CORPORATION
    Inventors: Yuusaku YOSHIDA, Takashi YOSHIDA, Hiroshi SUZUKI, Shuhei YOSHITA, Hisashi TERASHITA
  • Patent number: 6203414
    Abstract: The polishing apparatus comprises a turn table, which polishes a semiconductor wafer, and a holding and pressing part, which holds and presses the semiconductor wafer against a polishing surface of the turn table. The holding and pressing part transmits a force from an air bag to the semiconductor wafer via a pressurized fluid layer to thereby press the semiconductor wafer against the polishing surface via the pressurized fluid layer, so that the semiconductor wafer can be polished. Thereby, it is possible to uniformly polish the semiconductor wafer.
    Type: Grant
    Filed: April 1, 1998
    Date of Patent: March 20, 2001
    Assignee: Tokyo Seimitsu Co., Ltd.
    Inventors: Minoru Numoto, Takao Inaba, Kenji Sakai, Hisashi Terashita, Manabu Satoh
  • Patent number: 6080049
    Abstract: The first air guide groove is formed at the bottom of a carrier along the inner circumference of a circle whose radius corresponds to the maximum radius of a wafer. The air is supplied to the outer periphery of the wafer through the first air guide groove to form a pressure air layer between the carrier and the wafer. The formation of the pressure air layer makes the air pressure applied to the wafer uniform on the entire surface of the wafer, and thus, the wafer can be polished under a uniform pressure force. The second air guide groove is formed along the inner circumference of a circle whose radius corresponds to the minimum radius of the wafer, and therefore, the wafer with an orientation flat or notch can be polished under a uniform pressure force.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: June 27, 2000
    Assignee: Tokyo Seimitsu Co., Ltd.
    Inventors: Minoru Numoto, Takao Inaba, Hisashi Terashita
  • Patent number: 6027398
    Abstract: A wafer is polished while it is pressed against a polishing cloth through a pressure air layer, and a polished surface adjustment ring as well as the wafer are pressed against the polishing cloth. The wafer is polished in the state wherein a collapsing position of the polished surface adjustment ring with respect to the polishing cloth is set in such a way that the polishing pressure which is applied from the polishing cloth to the wafer can be constant.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: February 22, 2000
    Assignee: Tokyo Seimitsu Co., Ltd.
    Inventors: Minoru Numoto, Kenji Sakai, Manabu Satoh, Hisashi Terashita
  • Patent number: 5931725
    Abstract: A semiconductor wafer is held by a wafer mount plate, which is loosely inserted into a housing. An air chamber is formed between the wafer mount plate and the housing. A retainer ring encloses the semiconductor wafer, and the semiconductor wafer as well as the retainer ring contacts with a polishing pad. An roughness is formed at the bottom of the retainer ring so as to dress the polishing pad. Polishing liquid is supplied to the inside of the retainer ring. Thus, the polishing pressure can be uniformly applied and the polishing liquid can be uniformly supplied on the whole surface of the semiconductor wafer, and the polishing for the semiconductor wafer and the dressing for the polishing pad can be performed at the same time.
    Type: Grant
    Filed: July 24, 1997
    Date of Patent: August 3, 1999
    Assignee: Tokyo Seimitsu Co., Ltd.
    Inventors: Takao Inaba, Masaaki Oguri, Kenji Sakai, Minoru Numoto, Hisashi Terashita