Patents by Inventor Hisashi Uede
Hisashi Uede has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 4801920Abstract: A drive system for a thin-film EL matrix display panel includes first and second voltage doubler circuits and a DC booster circuit. A 1/4V.sub.M voltage, which has the 1/4 voltage level of the modulation voltage, is applied to the first voltage doubler circuit of which an output voltage is applied to a modulation voltage applying circuit. The 1/4V.sub.M voltage is further applied to the DC booster circuit which develops an output voltage having a voltage level of 1/2V.sub.W. The thus obtained 1/2V.sub.W voltage is applied to the second voltage doubler circuit of which an output voltage is applied to a write voltage applying circuit.Type: GrantFiled: September 16, 1983Date of Patent: January 31, 1989Assignee: Sharp Kabushiki KaishaInventors: Toshihiro Ohba, Hiroshi Kinoshita, Yoshiharu Kanatani, Hisashi Uede
-
Patent number: 4731958Abstract: A glass substrate for supporting an electroluminescent (EL) display element comprising two dielectric layers defining a thin film EL layer, and two electrode layers, attached to each of the two dielectric layers is characterized by being composed of barosilicic acid without hydrolytic products thereon. A method for preparing such a glass substrate comprises the steps of preparing a glass substrate composed of borosilic acid, grinding a surface of the glass substrate, and cleaning the surface of the glass substrate without soaking it in an acidic solution, so that the glass substrate is free from formed hydrolytic products on the surface.Type: GrantFiled: January 14, 1986Date of Patent: March 22, 1988Assignee: Sharp Kabushiki KaishaInventors: Hiroshi Kishishita, Etsuo Mizukami, Yoshihiro Endo, Takaaki Horita, Hisashi Uede
-
Patent number: 4686110Abstract: A thin-film electroluminescent (EL) display panel comprises a thin-film EL layer, first and second dielectric layers, the thin-film EL layer being disposed between the dielectric layers, first and second metal oxide layers, and first and second electrodes, the first and second metal oxide layers being disposed respectively between the first and second dielectric layers, and the first and second electrodes. Preferably, at least one of the first and second metal oxide layers is made of Al.sub.2 O.sub.3, SiO.sub.2 or the like with a thickness of about 100-800.ANG. and at least one of the dielectric layers being about 1000-3000.ANG..Type: GrantFiled: January 31, 1986Date of Patent: August 11, 1987Assignee: Sharp Kabushiki KaishaInventors: Yoshihiro Endo, Etsuo Mizukami, Hiroshi Kishishita, Hisashi Uede
-
Patent number: 4686426Abstract: A thin-film EL display panel drive circuit capable of varying the drive voltage according to changes in the number of emitting picture elements.Type: GrantFiled: September 26, 1985Date of Patent: August 11, 1987Assignee: Sharp Kabushiki KaishaInventors: Yoshihide Fujioka, Shigeyuki Harada, Toshihiro Ohba, Yoshiharu Kanatani, Hisashi Uede
-
Patent number: 4594589Abstract: A method for driving a thin-film electroluminescent (EL) display panel comprises the steps of charging the EL display panel by applying to the EL display panel a voltage of KV.sub.0 where V.sub.0 is a voltage for emitting electroluminescence from the EL display panel and K is more than zero and less than 1, and applying the voltage of V.sub.0 to the EL display panel, whereby the EL display panel is driven with a stepwise driving pulse due to the capacitance feature of the EL display panel. A circuit for enabling the method is also provided.Type: GrantFiled: August 27, 1982Date of Patent: June 10, 1986Assignee: Sharp Kabushiki KaishaInventors: Toshihiro Ohba, Hiroshi Kinoshita, Yoshiharu Kanatani, Hisashi Uede
-
Patent number: 4535329Abstract: For an electro-optical display cell which manifests the electrochromic phenomenon to place the cell into the colored state or bleached state in response to current supplied, a constant current driving technique is carried through in the color (write) mode and a constant voltage is carried through in the bleach (erase) mode.Type: GrantFiled: August 18, 1983Date of Patent: August 13, 1985Assignee: Sharp Kabushiki KaishaInventors: Katubumi Koyanagi, Hiroshi Take, Hisashi Uede
-
Patent number: 4487480Abstract: In a multi-layer matrix type liquid crystal display panel having a stack of a plurality of liquid crystal display cells and matrix electrodes provided for a respective one of the liquid crystal display cells, all supports of the respective liquid crystal display cells are piled sequentially one on top of the other with its longitudinal length longer and its lateral length shorter, than the next sequential top support thereby allowing enough room on all sides for electrode connections.Type: GrantFiled: February 25, 1983Date of Patent: December 11, 1984Assignee: Sharp Kabushiki KaishaInventors: Keisaku Nonomura, Toshiaki Takamatsu, Hisashi Uede, Tomio Wada
-
Patent number: 4486748Abstract: A system for driving a segmented type liquid crystal display comprising a thin film transistor (TFT) array including a plurality of TFTs each having a gate line, a source line, and a drain line, a pair of substrates with one carrying the thin film transistor array coupled to a plurality of segmented display electrodes and the other carrying a common electrode opposite to the segmented display electrodes, a liquid crystal material interposed between the pair of substrates. The system is characterized by a source line and drain line driving circuit for driving the source line and the drain line with a first voltage waveform and a second voltage waveform in such a manner that the ratio of the first voltage amplitude to the second voltage is so selected that both charging and discharging voltages in the forward and backward directions are zero when the TFTs are off.Type: GrantFiled: September 16, 1982Date of Patent: December 4, 1984Assignee: Sharp Kabushiki KaishaInventors: Keisaku Nonomura, Masataka Matsuura, Hisashi Uede, Kohhei Kishi, Hiroaki Kato
-
Patent number: 4485379Abstract: An EL panel including an array of scan electrodes, an array of data electrodes crossing the scan electrodes and a plurality of pixels each lying sandwiched between a respective one of the scan electrodes and a respective one of data electrodes is driven by a circuit for applying sequentially a write pulse voltage to the scan electrodes in a line scanning fashion and a circuit for applying a refresh pulse voltage of a polarity opposite to that of the write pulse voltage throughout the panel upon completion of field scanning. The system further includes a circuit for applying throughout the display panel upon completion of field scanning a write compensation pulse of the same polarity as that of the refresh pulse voltage and an amplitude insufficient to cause electroluminescence, and a refresh compensation pulse of a polarity opposite to that of the refresh pulse and an amplitude not enough to cause electroluminescence.Type: GrantFiled: February 10, 1982Date of Patent: November 27, 1984Assignee: Sharp Kabushiki KaishaInventors: Hiroshi Kinoshita, Toshihiro Ohba, Masashi Kawaguchi, Yoshiharu Kanatani, Hisashi Uede
-
Patent number: 4479120Abstract: A display device includes an EL panel including an array of scan electrodes, an array of data electrodes crossing the scan electrodes and a plurality of pixels each lying sandwiched between a respective one of the scan electrodes and a respective one of data electrodes, a circuit for applying sequentially a write pulse voltage V.sub.W to the scan electrodes in a line scanning fashion and a circuit for applying a refresh pulse voltage V.sub.R of a polarity opposite that of the write pulse voltage V.sub.W throughout the panel upon completion of field scanning. A circuit is further provided for applying throughout the display panel upon completion of field scanning a pulse voltage having the same polarity as that of the refresh pulse V.sub.R and an amplitude insufficient to cause electroluminescence. Alternatively, a pulse voltage having a polarity opposite that of the refresh pulse V.sub.R and an amplitude insufficient to cause electroluminescence may be applied after the application of the refresh pulse V.sub.Type: GrantFiled: October 13, 1981Date of Patent: October 23, 1984Assignee: Sharp Kabushiki KaishaInventors: Toshihiro Ohba, Masashi Kawaguchi, Hiroshi Kinoshita, Yoshiharu Kanatani, Hisashi Uede
-
Patent number: 4447757Abstract: A thin electroluminescent (EL) display panel is disclosed which comprises an EL thin film unit for generating an EL light, two glass substrates for sealing the EL thin film unit, a protective liquid filled within a cavity defined by the two glass substrates for protecting the EL thin film unit, a pair of electrodes for conducting electric energy to the EL thin film unit, an injection hole for introducing the protective liquid, the injection hole being sealed, and a covering member for completely covering the sealed injection hole.Type: GrantFiled: June 11, 1981Date of Patent: May 8, 1984Assignee: Sharp Kabushiki KaishaInventors: Masashi Kawaguchi, Toshiaki Ishii, Kinichi Isaka, Hisashi Uede
-
Patent number: 4426133Abstract: A twisted nematic liquid crystal is characterized in that the direction of longitudinal axes of liquid crystal molecules adjacent each of a pair of polarizers is deviated with respect to the orientation vector of each of the polarizers in order to improve display contrast ratio.Type: GrantFiled: December 23, 1980Date of Patent: January 17, 1984Assignee: Sharp Kabushiki KaishaInventors: Fumiaki Funada, Shigehiro Minezaki, Syuichi Kozaki, Hisashi Uede
-
Patent number: 4422730Abstract: A liquid crystal display device comprises a pair of substrates, a first patterned layer formed on a part of one of the substrates, a second layer formed on the remaining part of the one of the substrates, the thickness of the second layer being substantially identical to that of the first patterned layer to provide a layer uniform in thickness, and a third layer formed on the uniform layer to provide orientation of molecules of a liquid crystal layer disposed between the pair of substrates. The uniform layer is manufactured by the steps of forming the first patterned layer on part of the one of the substrates, and forming the second layer on the remaining part of the one of the substrates, using a lift-off method.Type: GrantFiled: October 16, 1980Date of Patent: December 27, 1983Assignee: Sharp Kabushiki KaishaInventors: Shuichi Kozaki, Fumiaki Funada, Shigehiro Minezaki, Hisashi Uede
-
Patent number: 4412155Abstract: An aging method for a thin-film electroluminescent display element comprises the steps of applying an AC voltage having at least one characteristic selected from the features that its frequency is approximately within 500 Hz through 10 KHz, its pulse width is approximately within 20 .mu.sec through 100 .mu.sec, and its voltage is of a magnitude, at which a virgin thin-film electroluminescent display element starts to emit electroluminescence, plus 30 V through 60 V.Type: GrantFiled: June 18, 1981Date of Patent: October 25, 1983Assignee: Sharp Kabushiki KaishaInventors: Kinichi Isaka, Masashi Kawaguchi, Hisashi Uede
-
Patent number: 4404578Abstract: A thin film transistor comprises a substrate, a gate electrode, a drain electrode, a source electrode, an insulative layer, and a semiconductor layer for the purpose of switching display signals to be applied to at least one display element of a display device. Preferably, the thin film transistor is mounted on the same substrate on which the display element is mounted. The selected material for the display element electrode is identical to at least one selected from the gate electrode, the source electrode, and the drain electrode. In another aspect of the present invention neither the gate electrode nor the insulating layer overlap either of the drain electrode or the source electrode. A resistance value of the semiconductor layer between the source and the drain electrodes is considerably less than the resistance value of the semiconductor channel layer controlled by the gate electrode. For this purpose, at least one of the width, thickness, and impurity concentration is varied therebetween.Type: GrantFiled: July 30, 1980Date of Patent: September 13, 1983Assignee: Sharp Kabushiki KaishaInventors: Yutaka Takafuji, Keisaku Nonomura, Sadatoshi Takechi, Hisashi Uede, Tomio Wada
-
Patent number: 4399015Abstract: A method for fabricating an indium tin oxide (ITO) film comprises depositing the ITO film on a heat-resisting substrate by sputtering using a metal alloy target of In-Sn in an atmosphere including an active gas, and heat-treating the ITO film at about 550-650 degrees Centigrade in an oxygen-free atmosphere. Preferably, the heat-resisting substrate comprises an aluminoborosilicate glass. Further, sputtering, preferably reactive sputtering, is employed.Type: GrantFiled: February 1, 1982Date of Patent: August 16, 1983Assignee: Sharp Kabushiki KaishaInventors: Yoshihiro Endo, Yoshito Yamashita, Hiroshi Kishishita, Hisashi Uede
-
Patent number: 4386352Abstract: A matrix type display panel is disclosed which comprises a plurality of gate lines, a plurality of source lines normal to the gate lines, a pair of substates with one carrying a thin film transistor (TFT) array including a plurality of TFTs one for each of the intersections of the gate and source lines and the other carrying a common electrode and liquid crystal material interposed between the TFT array and the common electrode. The common electrode is supplied with the voltage of which the waveform is different between odd scanning frames and during even scanning frames. In a write mode, the source line is supplied with a pair of positive and negative pulses during the odd scanning frames and with the zero voltage during the even scanning frames. In a non-write mode, on the other hand, the source line is supplied with the zero voltage during the even scanning frames and with a pair of positive and negative pulses during the odd scanning frames.Type: GrantFiled: January 30, 1981Date of Patent: May 31, 1983Assignee: Sharp Kabushiki KaishaInventors: Heisaku Nonomura, Keiichiro Shimizu, Kohei Kishi, Hisashi Uede
-
Patent number: 4385292Abstract: A system is disclosed for driving a segmented type liquid crystal display comprising a thin film transistor (TFT) array including a plurality of TFTs each having a gate line, a source line, and a drain line, a pair of substrates with one carrying the thin film transistor array coupled to a plurality of segmented display electrodes and the other carrying a common electrode opposite to the segmented display electrodes, a liquid crystal material interposed between the pair of substrates. The system is characterized by a source line and drain line driving circuit for driving the source line and the drain line with a first voltage waveform and a second voltage waveform in such a manner that the ratio of the first voltage amplitude to the second voltage is so selected that both charging and discharging voltages in the forward and backward directions are zero when the TFTs are off.Type: GrantFiled: July 25, 1980Date of Patent: May 24, 1983Assignee: Sharp Kabushiki KaishaInventors: Keisaku Nonomura, Masataka Matsuura, Hisashi Uede, Kohhei Kishi, Hiroaki Kato
-
Patent number: 4375319Abstract: Electrochromic display device in which a display electrode is formed by depositing electrochromic material to a required configuration on a transparent conductive film comprising a portion contacted by the electrochromic material and a portion constituting a lead extension for connection to an external circuit, and both the conductive film lead extension and electrochromic material are covered by a layer of material which permits passage of ions between an electrolyte and the electrochromic material but is an insulator with respect to electrons, and thus colored display may be effected in a required manner but damage of the conductive film is prevented.Type: GrantFiled: June 26, 1981Date of Patent: March 1, 1983Assignee: Sharp Kabushiki KaishaInventors: Tomio Wada, Hisashi Uede, Sadatoshi Takechi, Kohzo Yano
-
Patent number: RE31280Abstract: Electrochromic display device manufacture method wherein electrochromic material is deposited in a single layer on a single film of conductive material over the whole area of glass substrate and then the electrochromic material and conductive material are successively etched through a single mask which defines a display segment pattern and remains in position throughout the whole etching process, whereby etched edge portions of the different materials are in excellent alignment and there is therefore small plate area for a reverse emf cell and good display device performance is achieved. The electrochromic material may be etched by the solution employed for developing the photoresist, whereby an etching process step is eliminated.Type: GrantFiled: October 14, 1981Date of Patent: June 21, 1983Assignee: Sharp Kabushiki KaishaInventors: Kozo Yano, Yasuhiko Inami, Hiroshi Hamada, Hisashi Uede