Abstract: A wiring board (1, 1a, 20, 20a) having: a board body (2, 22) including an insulating material and having a front surface (3, 23), a back surface (4, 24), a cavity (5, 25) having an opening in the front surface (3, 23) of the board body (2, 22) and having a bottom surface (6, 26) and a side surface (7, 27), and a projection which is provided on a front surface side of the side surface (7, 27) of the cavity and projects toward a center of the opening; a metal layer (11) provided on the side surface (7, 27) of the cavity; and an insulating portion which is provided on a back surface (9, 29) of the projection (8, 28) so as to define an obtuse angle (?) with the metal layer (11), or which covers at least a top end portion of the metal layer (11).

Abstract: A ceramic substrate comprising a metallic layer on its surface, wherein said metallic layer includes: a silver layer containing silver; a gold layer containing gold; and a nickel layer containing nickel, in this order from an outermost layer of said metallic layer.

Abstract: A wiring board (1, 1a, 20, 20a) having: a board body (2, 22) including an insulating material and having a front surface (3, 23), a back surface (4, 24), a cavity (5, 25) having an opening in the front surface (3, 23) of the board body (2, 22) and having a bottom surface (6, 26) and a side surface (7, 27), and a projection which is provided on a front surface side of the side surface (7, 27) of the cavity and projects toward a center of the opening; a metal layer (11) provided on the side surface (7, 27) of the cavity; and an insulating portion which is provided on a back surface (9, 29) of the projection (8, 28) so as to define an obtuse angle (?) with the metal layer (11), or which covers at least a top end portion of the metal layer (11).

Abstract: A ceramic substrate comprising a metallic layer on its surface, wherein said metallic layer includes: a silver layer containing silver; a gold layer containing gold; and a nickel layer containing nickel, in this order from an outermost layer of said metallic layer.

Abstract: A method for fabricating a component board which includes forming a first main-face-side Au plating layer on surfaces of main-face-side connection terminals and a first back-face-side Au plating layer on surfaces of back-face-side connection terminals of the component board; covering the first main-face-side Au plating layer with a protection layer; forming a second back-face-side Au plating layer on the first back-face-side Au plating layer; and removing the protection layer after completing the second Au plating step. Alternatively, the first back-face-side Au plating layer may be removed after completing the masking step. Displacement Au plating is used as the first and second Au plating.

Abstract: A printed-wiring substrate 1 includes internal dielectric resin layers 12 and 14. A main-surface-side external dielectric resin layer 13 is formed on the internal dielectric resin layer 12 such that the surface thereof serves as a substrate main-surface 1A. A back-surface-side external dielectric resin layer 15 is formed on the internal dielectric resin layer 14 such that the surface thereof serves as a substrate back-surface 1B. A surface 12A of the main-surface-side internal dielectric resin layer 12 and a surface 14A of the back-surface-side internal dielectric resin layer 14 are roughened. The substrate main-surface 1A and the substrate back-surface 1B are roughened such that surface roughness thereof is lower than that of the surfaces 12A and 14A.

Abstract: A printed-wiring substrate 1 has main-face-side connection terminals 33 for solder-bonding to connection terminals 83 of an IC chip 81 on a main face 1A thereof and back-face-side connection terminals 41 for connecting, through mechanical contact, to connection terminals 93 of a motherboard 91 on a back face 1B thereof. The surface of each of the main-face-side connection terminals 33 is covered with a main-face-side displacement Au plating layer 45 having a thickness of 0.03 to 0.12 &mgr;m, and the surface of each of the back-face-side connection terminals 41 is covered with a back-face-side displacement Au plating layer 55, which is thicker than the main-face-side displacement Au plating layer 45 and has a thickness of 0.2 &mgr;m or greater.

Abstract: A process for producing a substrate 1 having a base-metal plating layer, which includes an immersion step for immersing the substrate 1 in a plating solution contained in a plating tank 33, to thereby form a base-metal plating layer; a washing step for removing the substrate 1 from the plating tank 33, transferring the substrate 1 to a washing tank, and washing the substrate 1; and a cooling step for applying a cooling liquid to the substrate 1 during at least a portion of the period during which the substrate is transferred to a position where the washing step is carried out after completing the immersion step, to thereby cool the substrate 1. An apparatus for carrying out the above process is also disclosed.

Abstract: A printed-wiring substrate 1 has main-face-side connection terminals 33 for solder-bonding to connection terminals 83 of an IC chip 81 on a main face 1A thereof and back-face-side connection terminals 41 for connecting, through mechanical contact, to connection terminals 93 of a motherboard 91 on a back face 1B thereof. The surface of each of the main-face-side connection terminals 33 is covered with a main-face-side displacement Au plating layer 45 having a thickness of 0.03 to 0.12 &mgr;m, and the surface of each of the back-face-side connection terminals 41 is covered with a back-face-side displacement Au plating layer 55, which is thicker than the main-face-side displacement Au plating layer 45 and has a thickness of 0.2 &mgr;m or greater.

Abstract: A process for producing a substrate 1 having a base-metal plating layer, which includes an immersion step for immersing the substrate 1 in a plating solution contained in a plating tank 33, to thereby form a base-metal plating layer; a washing step for removing the substrate 1 from the plating tank 33, transferring the substrate 1 to a washing tank, and washing the substrate 1; and a cooling step for applying a cooling liquid to the substrate 1 during at least a portion of the period during which the substrate is transferred to a position where the washing step is carried out after completing the immersion step, to thereby cool the substrate 1. An apparatus for carrying out the above process is also disclosed.

Abstract: A printed-wiring substrate 1 includes internal dielectric resin layers 12 and 14. A main-surface-side external dielectric resin layer 13 is formed on the internal dielectric resin layer 12 such that the surface thereof serves as a substrate main-surface 1A. A back-surface-side external dielectric resin layer 15 is formed on the internal dielectric resin layer 14 such that the surface thereof serves as a substrate back-surface 1B. A surface 12A of the main-surface-side internal dielectric resin layer 12 and a surface 14A of the back-surface-side internal dielectric resin layer 14 are roughened. The substrate main-surface 1A and the substrate back-surface 1B are roughened such that surface roughness thereof is lower than that of the surfaces 12A and 14A.

Abstract: A printed-wiring substrate 1 has main-face-side connection terminals 33 for solder-bonding to connection terminals 83 of an IC chip 81 on a main face 1A thereof and back-face-side connection terminals 41 for connecting, through mechanical contact, to connection terminals 93 of a motherboard 91 on a back face 1B thereof. The surface of each of the main-face-side connection terminals 33 is covered with a main-face-side displacement Au plating layer 45 having a thickness of 0.03 to 0.12 &mgr;m, and the surface of each of the back-face-side connection terminals 41 is covered with a back-face-side displacement Au plating layer 55, which is thicker than the main-face-side displacement Au plating layer 45 and has a thickness of 0.2 &mgr;m or greater.

Abstract: In accordance with the present invention, there is provided a ceramic IC package base which comprises a ceramic substrate, and a heat radiating member adhered to a side surface of the ceramic substrate and made of copper or copper alloy. The heat radiating member has an adhering portion at which it is adhered to the ceramic substrate. The adhering portion, when the heat radiating member is observed in a plan view, has one side which is equal to or larger than 8 mm. The adhering portion is of the thickness within the range from 0.25 mm to 0.76 mm. A ceramic IC package cover is also provided.