Abstract: A horizontal-synchronizing-pulse measuring circuit which is reset by a vertical synchronizing pulse to measure the number of a plurality of horizontal synchronizing pulses includes a reference-signal generating circuit for generating a reference signal, an enabling-signal generating circuit for generating an enabling signal, and a vertical-position detecting circuit. The vertical-position detecting circuit allows outputting of the reference signal when the enabling signal is active and outputting of a holding signal when the enabling signal is non-active. The measuring circuit further comprises two flip-flops, the first flip-flop receiving an output from the vertical-position detecting circuit and a clock input of the vertical synchronizing pulse and the second flip-flop receiving the output from the first flip-flop and a clock input of the vertical synchronizing pulse.