Patents by Inventor Hisataka Kanada

Hisataka Kanada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8536000
    Abstract: First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1? of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1 of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2? of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2 of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: September 17, 2013
    Assignee: Panasonic Corporation
    Inventors: Yuichiro Sasaki, Keiichi Nakamoto, Katsumi Okashita, Hisataka Kanada, Bunji Mizuno
  • Publication number: 20120015504
    Abstract: A semiconductor device includes: a first semiconductor region formed on a substrate and having an upper surface and a side surface; a first impurity region of a first conductivity type formed in an upper portion of the first semiconductor region; a second impurity region of a first conductivity type formed in a side portion of the first semiconductor region; and a gate insulating film formed so as to cover at least a side surface and an upper corner of a predetermined portion of the first semiconductor region. A radius of curvature r? of an upper corner of a portion of the first semiconductor region located outside the gate insulating film is greater than a radius of curvature r of an upper corner of a portion of the first semiconductor region located under the gate insulating film and is less than or equal to 2r.
    Type: Application
    Filed: September 26, 2011
    Publication date: January 19, 2012
    Applicant: Panasonic Corporation
    Inventors: Yuichiro SASAKI, Katsumi Okashita, Keiichi Nakamoto, Hisataka Kanada, Bunji Mizuno
  • Patent number: 8063437
    Abstract: A semiconductor device includes: a first semiconductor region formed on a substrate and having an upper surface and a side surface; a first impurity region of a first conductivity type formed in an upper portion of the first semiconductor region; a second impurity region of a first conductivity type formed in a side portion of the first semiconductor region; and a gate insulating film formed so as to cover at least a side surface and an upper corner of a predetermined portion of the first semiconductor region. A radius of curvature r? of an upper corner of a portion of the first semiconductor region located outside the gate insulating film is greater than a radius of curvature r of an upper corner of a portion of the first semiconductor region located under the gate insulating film and is less than or equal to 2r.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: November 22, 2011
    Assignee: Panasonic Corporation
    Inventors: Yuichiro Sasaki, Katsumi Okashita, Keiichi Nakamoto, Hisataka Kanada, Bunji Mizuno
  • Publication number: 20110275201
    Abstract: First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1? of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1 of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2? of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2 of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.
    Type: Application
    Filed: July 18, 2011
    Publication date: November 10, 2011
    Applicant: Panasonic Corporation
    Inventors: Yuichiro SASAKI, Keiichi Nakamoto, Katsumi Okashita, Hisataka Kanada, Bunji Mizuno
  • Patent number: 8004045
    Abstract: First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1? of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1 of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2? of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2 of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: August 23, 2011
    Assignee: Panasonic Corporation
    Inventors: Yuichiro Sasaki, Keiichi Nakamoto, Katsumi Okashita, Hisataka Kanada, Bunji Mizuno
  • Patent number: 7888937
    Abstract: A beam current sensor is composed of a cylindrical super-conductive body having a bridge unit formed on the outer diameter side wherein a beam passes through the inner diameter side. The sensor improves efficiency of creating a magnetic field from a current and can measure a beam current as 1 nA. The bridge unit includes a first coil unit formed so as to have an eddy shape wound counterclockwise from the outer diameter side toward the inner diameter side; a second coil unit formed so as to have an eddy shape wound clockwise from the outer diameter side toward the inner diameter side; and a connection portion for connecting the center position of the inner diameter side of the first coil unit with the center position of the inner diameter side of the second coil.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: February 15, 2011
    Assignees: Riken, Panasonic Corporation
    Inventors: Tamaki Watanabe, Takeshi Katayama, Masayuki Kase, Tokihiro Ikeda, Shin-ichi Watanabe, Takeo Kawaguchi, Yu-ichiro Sasaki, Bunji Mizuno, Hisataka Kanada
  • Patent number: 7858479
    Abstract: An object is to provide a semiconductor device in which uniform properties are intended and high yields are provided. Process steps are provided in which variations are adjusted in doping and annealing process steps that are subsequent process steps so as to cancel in-plane variations in a substrate caused by dry etching to finally as well provide excellent in-plane consistency in a substrate.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: December 28, 2010
    Assignee: Panasonic Corporation
    Inventors: Bunji Mizuno, Yuichiro Sasaki, Ichiro Nakayama, Hiroyuki Ito, Tomohiro Okumura, Cheng-Guo Jin, Katsumi Okashita, Hisataka Kanada
  • Publication number: 20090289300
    Abstract: First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1? of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1 of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2? of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2 of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.
    Type: Application
    Filed: July 30, 2009
    Publication date: November 26, 2009
    Inventors: Yuichiro SASAKI, Keiichi Nakamoto, Katsumi Okashita, Hisataka Kanada, Bunji Mizuno
  • Patent number: 7535220
    Abstract: A measuring device includes a magnetic shielding part for shielding an outer magnetic field, and a plurality of magnetic field sensors which are arranged in a shielding space which is formed by the magnetic shielding part, wherein the magnetic field sensor includes a plurality of magnetic field collection mechanisms which collect magnetic fields which the beam current to be measured generates, and the magnetic field collection mechanism is a cylindrical structural body which has at least a surface thereof formed of a superconductive body and includes a bridge portion which has only a portion thereof formed of a superconductive body on an outer peripheral portion thereof, and a magnetic field which the beam current to be measured generates is measured by the magnetic field sensors. Due to the arrangement of the plurality of magnetic field sensors, a beam position and a beam current can be detected.
    Type: Grant
    Filed: February 10, 2005
    Date of Patent: May 19, 2009
    Assignee: Panasonic Corporation
    Inventors: Yuichiro Sasaki, Tamaki Watanabe, Takeo Kawaguchi, Shinichi Watanabe, Takeshi Katayama, Bunji Mizuno, Hisataka Kanada
  • Publication number: 20090026540
    Abstract: A semiconductor device includes: a first semiconductor region formed on a substrate and having an upper surface and a side surface; a first impurity region of a first conductivity type formed in an upper portion of the first semiconductor region; a second impurity region of a first conductivity type formed in a side portion of the first semiconductor region; and a gate insulating film formed so as to cover at least a side surface and an upper corner of a predetermined portion of the first semiconductor region. A radius of curvature r? of an upper corner of a portion of the first semiconductor region located outside the gate insulating film is greater than a radius of curvature r of an upper corner of a portion of the first semiconductor region located under the gate insulating film and is less than or equal to 2r.
    Type: Application
    Filed: August 19, 2008
    Publication date: January 29, 2009
    Applicant: Matsushita Electric Industrial, Ltd.
    Inventors: Yuichiro Sasaki, Katsumi Okashita, Keiichi Nakamoto, Hisataka Kanada, Bunji Mizuno
  • Publication number: 20080196834
    Abstract: A liquid phase etching method which comprises spraying a chemically reactive liquid, with a specific speed, to a solid article, an aggregate of solid articles or a gelatinous material to be treated; and a liquid etching apparatus having a mechanism for holding a processing object to be treated and a nozzle structure for spraying a chemically reactive liquid to the processing object to be treated which is held by the mechanism. The method and apparatus allow the significant improvement of the etching rate while maintaining the accuracy of etching.
    Type: Application
    Filed: April 25, 2008
    Publication date: August 21, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Bunji Mizuno, Yuichiro Sasaki, Ichiro Nakayama, Hisataka Kanada
  • Patent number: 7378031
    Abstract: A liquid phase etching method which comprises spraying a chemically reactive liquid, with a specific speed, to a solid article, an aggregate of solid articles or a gelatinous material to be treated; and a liquid etching apparatus having a mechanism for holding a processing object to be treated and a nozzle structure for spraying a chemically reactive liquid to the processing object to be treated which is held by the mechanism. The method and apparatus allow the significant improvement of the etching rate while maintaining the accuracy of etching.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: May 27, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Bunji Mizuno, Yuichiro Sasaki, Ichiro Nakayama, Hisataka Kanada
  • Publication number: 20080024126
    Abstract: The present invention provides a beam measuring device which can measure a beam current value with high accuracy in a non-destructive manner and, at the same time, can measure a position of a beam. A measuring device includes a magnetic shielding part for shielding an outer magnetic field, and a plurality of magnetic field sensors which are arranged in a shielding space which is formed by the magnetic shielding part, wherein the magnetic field sensor includes a plurality of magnetic field collection mechanisms which collect magnetic fields which the beam current to be measured generates, and the magnetic field collection mechanism is a cylindrical structural body which has at least a surface thereof formed of a superconductive body and includes a bridge portion which has only a portion thereof formed of a superconductive body on an outer peripheral portion thereof, and a magnetic field which the beam current to be measured generates is measured by the magnetic field sensors.
    Type: Application
    Filed: February 10, 2005
    Publication date: January 31, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yuichiro Sasaki, Tamaki Watanabe, Takeo Kawaguchi, Shinichi Watanabe, Takeshi Katayama, Bunji Mizuno, Hisataka Kanada
  • Publication number: 20070229057
    Abstract: A beam current sensor is composed of a cylindrical super-conductive body having a bridge unit formed on the outer diameter side wherein a beam passes through the inner diameter side. The sensor improves efficiency of creating a magnetic field from a current and can measure a beam current as 1 nA. The bridge unit includes a first coil unit formed so as to have an eddy shape wound counterclockwise from the outer diameter side toward the inner diameter side; a second coil unit formed so as to have an eddy shape wound clockwise from the outer diameter side toward the inner diameter side; and a connection portion for connecting the center position of the inner diameter side of the first coil unit with the center position of the inner diameter side of the second coil.
    Type: Application
    Filed: September 22, 2004
    Publication date: October 4, 2007
    Inventors: Tamaki Watanabe, Takeshi Katayama, Masayuki Kase, Tokihiro Ikeda, Shin-ichi Watanabe, Takeo Kawaguchi, Yu-ichiro Sasaki, Bunji Mizuno, Hisataka Kanada
  • Publication number: 20070212837
    Abstract: An object is to provide a semiconductor device in which uniform properties are intended and high yields are provided. Process steps are provided in which variations are adjusted in doping and annealing process steps that are subsequent process steps so as to cancel in-plane variations in a substrate caused by dry etching to finally as well provide excellent in-plane consistency in a substrate.
    Type: Application
    Filed: May 12, 2005
    Publication date: September 13, 2007
    Inventors: Bunji Mizuno, Yuichiro Sasaki, Ichiro Nakayama, Hiroyuki Ito, Tomohiro Okumura, Cheng-Guo Jin, Katsumi Okashita, Hisataka Kanada
  • Patent number: 7192854
    Abstract: A method of plasma doping in which dilution of B2H6 is maximized for enhanced safety and stable plasma generation and sustention can be carried out without lowering of doping efficiency and in which the amount of dopant injected can be easily controlled. In particular, a method of plasma doping characterized in that B2H6 gas is used as a material containing doping impurity while He is used as a substance of high dissociation energy and that the concentration of B2H6 in mixed gas is less than 0.05%.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: March 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuichiro Sasaki, Bunji Mizuno, Ichiro Nakayama, Hisataka Kanada, Tomohiro Okumura
  • Publication number: 20060049140
    Abstract: A liquid phase etching method which comprises spraying a chemically reactive liquid, with a specific speed, to a solid article, an aggregate of solid articles or a gelatinous material to be treated; and a liquid etching apparatus having a mechanism for holding a processing object to be treated and a nozzle structure for spraying a chemically reactive liquid to the processing object to be treated which is held by the mechanism. The method and apparatus allow the significant improvement of the etching rate while maintaining the accuracy of etching.
    Type: Application
    Filed: February 23, 2004
    Publication date: March 9, 2006
    Inventors: Bunji Mizuno, Yuichiro Sasaki, Ichiro Nakayama, Hisataka Kanada
  • Publication number: 20050287776
    Abstract: A method of plasma doping in which dilution of B2H6 is maximized for enhanced safety and stable plasma generation and sustention can be carried out without lowering of doping efficiency and in which the amount of dopant injected can be easily controlled. In particular, a method of plasma doping characterized in that B2H6 gas is used as a material containing doping impurity while He is used as a substance of high dissociation energy and that the concentration of B2H6 in mixed gas is less than 0.05%.
    Type: Application
    Filed: November 18, 2003
    Publication date: December 29, 2005
    Inventors: Yuichiro Sasaki, Bunji Mizuno, Ichiro Nakayama, Hisataka Kanada, Tomohiro Okumura