Patents by Inventor Hisato Kawano

Hisato Kawano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11728861
    Abstract: A wireless communication device that implements beamforming includes: a storage, a processor, and a radio circuit. The storage stores directivity information that indicates a directivity of a radio intensity obtained when beams are formed in a plurality of main lobe directions designated in advance. The processor calculates, based on the directivity information, an interference to a first beam from a second beam when an instruction to form the first beam and the second beam is given. The first beam is configured to transmit a first signal in a first main lobe direction. The second beam is configured to transmit a second signal in a second main lobe direction. The processor generates, based on the calculated interference, a cancellation signal for canceling the second signal in the first main lobe direction. The radio circuit transmits the first signal and the cancellation signal.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: August 15, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Yusuke Tobisu, Kohei Ohta, Satoshi Matsubara, Akihiko Komatsuzaki, Hisato Kawano, Hideyuki Kannari
  • Publication number: 20220247462
    Abstract: A wireless communication device that implements beamforming includes: a storage, a processor, and a radio circuit. The storage stores directivity information that indicates a directivity of a radio intensity obtained when beams are formed in a plurality of main lobe directions designated in advance. The processor calculates, based on the directivity information, an interference to a first beam from a second beam when an instruction to form the first beam and the second beam is given. The first beam is configured to transmit a first signal in a first main lobe direction. The second beam is configured to transmit a second signal in a second main lobe direction. The processor generates, based on the calculated interference, a cancellation signal for canceling the second signal in the first main lobe direction. The radio circuit transmits the first signal and the cancellation signal.
    Type: Application
    Filed: September 17, 2021
    Publication date: August 4, 2022
    Applicant: FUJITSU LIMITED
    Inventors: Yusuke Tobisu, Kohei Ohta, Satoshi Matsubara, Akihiko Komatsuzaki, Hisato Kawano, HIDEYUKI KANNARI
  • Publication number: 20180302113
    Abstract: There is provided a distortion cancellation apparatus including a memory, and a processor coupled to the memory and the processor configured to acquire transmission signals to be wirelessly transmitted at different frequencies, acquire a received signal to which intermodulation signals generated by the transmission signals are added, generate cancellation signals respectively corresponding to the intermodulation signals added to the received signal by using an arithmetic expression including the transmission signals and the received signal, calculate an influence rate indicating a magnitude of a signal level of each of the intermodulation signals within a band of the received signal, and first cancel an intermodulation signal out of the intermodulation signals added to the received signal wherein the influence rate of the intermodulation signal first canceled is high out of the intermodulation signals added to the received signal, based on the cancellation signals.
    Type: Application
    Filed: April 3, 2018
    Publication date: October 18, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Satoshi Matsubara, Yusuke Tobisu, Hisato Kawano, Hideyuki Kannari
  • Patent number: 7561856
    Abstract: In a network employing code division multiplex access, a distortion compensation amplifying apparatus is provided which is capable of making quick response to carry out the distortion compensation with high accuracy even if the signal power to be inputted thereto varies rapidly. In this distortion compensation amplifying apparatus, the renewal of a distortion compensation coefficient in a renewing unit is complemented on the basis of a result of amplification in an amplifier with respect to a signal code-division-multiplexed in a pseudo-signal multiplexing unit.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: July 14, 2009
    Assignee: Fujitsu Limited
    Inventors: Masayuki Watabe, Yasuhito Funyu, Hiroaki Abe, Hisato Kawano
  • Publication number: 20050164656
    Abstract: In a network employing code division multiplex access, a distortion compensation amplifying apparatus is provided which is capable of making quick response to carry out the distortion compensation with high accuracy even if the signal power to be inputted thereto varies rapidly. In this distortion compensation amplifying apparatus, the renewal of a distortion compensation coefficient in a renewing unit is complemented on the basis of a result of amplification in an amplifier with respect to a signal code-division-multiplexed in a pseudo-signal multiplexing unit.
    Type: Application
    Filed: May 6, 2004
    Publication date: July 28, 2005
    Inventors: Masayuki Watabe, Yasuhito Funyu, Hiroaki Abe, Hisato Kawano
  • Patent number: 5329538
    Abstract: In the present invention, input data are extracted by a clock and compared with the previous input data. A cyclic counter is provided for cyclically counting clock signals in each noise erasure time period (the maximum retaining time of a signal referred to as noise). When a change is detected in input data, the counter value is stored. When the input data indicate no changes, the counter value and the stored counter value are compared. If a non-coincident result is outputted, it indicates that the noise erasure time has not passed since the input data indicated a change. Therefore, the input data are not outputted. If a coincident result is outputted, it indicates that the cyclic counter counted one cycle. That is, the noise erasure time has passed. Therefore, the input data are outputted since the input data are not recognized as noise.
    Type: Grant
    Filed: March 6, 1992
    Date of Patent: July 12, 1994
    Assignee: Fujitsu Limited
    Inventors: Hisato Kawano, Takashi Tabu, Shigeru Sekine, Masaki Kira