Patents by Inventor Hisatoshi Kashino

Hisatoshi Kashino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10073126
    Abstract: Proposed are a C-V characteristic measurement system and a method of measuring C-V characteristics that allow for less change in resistivity with time in repeated measurement of a single crystal silicon wafer using a mercury electrode, as compared to those in the related arts. Measurement is conducted with use of a C-V characteristic measurement system including: a mercury probe 30 for putting mercury as an electrode to contact with a single crystal silicon wafer; an LCR meter 40 for forming a depletion layer by supplying a high-frequency wave to the single crystal silicon wafer via the mercury probe 30 to apply a reverse bias voltage to the single crystal silicon wafer while measuring a capacitance of the depletion layer; analysis software for calculating C-V characteristics based on the reverse bias voltage and the capacitance of the depletion layer; and a static electricity removing device 20 for removing static electricity of the single crystal silicon wafer.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: September 11, 2018
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Fumitaka Kume, Hisatoshi Kashino
  • Publication number: 20150025826
    Abstract: Proposed are a C-V characteristic measurement system and a method of measuring C-V characteristics that allow for less change in resistivity with time in repeated measurement of a single crystal silicon wafer using a mercury electrode, as compared to those in the related arts. Measurement is conducted with use of a C-V characteristic measurement system including: a mercury probe 30 for putting mercury as an electrode to contact with a single crystal silicon wafer; an LCR meter 40 for forming a depletion layer by supplying a high-frequency wave to the single crystal silicon wafer via the mercury probe 30 to apply a reverse bias voltage to the single crystal silicon wafer while measuring a capacitance of the depletion layer; analysis software for calculating C-V characteristics based on the reverse bias voltage and the capacitance of the depletion layer; and a static electricity removing device 20 for removing static electricity of the single crystal silicon wafer.
    Type: Application
    Filed: February 19, 2013
    Publication date: January 22, 2015
    Inventors: Fumitaka Kume, Hisatoshi Kashino