Patents by Inventor Hisatoshi YAMAOKA

Hisatoshi YAMAOKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10897371
    Abstract: An information processing apparatus including: a memory, and a processor coupled to the memory and configured to perform a process including: setting a forwarding path or a forwarding method; creating a data list storing a random value; and requesting each of a plurality of clients to add an attribute value stored by the client to the data list and forward the data list using the forwarding path or the forwarding method.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: January 19, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Hisatoshi Yamaoka, Miwa Okabayashi, Eiichi Takahashi, Akira Shiba, Tatsuro Matsumoto
  • Patent number: 10860395
    Abstract: An event processing method includes storing in a storage unit, upon receipt of a control message representing information indicating a type of an event to be an execution condition for a plug-in and information regarding the plug-in, in association with each other, the information indicating the type of the event specified from the received control message and the plug-in, in association with each other. The method also includes executing the plug-in upon receipt of an event message representing the information indicating the type of the event. The plug-in being stored in the storage unit in association with the information indicating the type of the event specified from the received event message.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: December 8, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Gaku Nakagawa, Yasuhiko Kanemasa, Riichiro Take, Hisatoshi Yamaoka, Miwa Okabayashi
  • Patent number: 10862695
    Abstract: An information processing apparatus including: a memory, and a processor coupled to the memory and configured to perform a process including: setting a forwarding path or a forwarding method; creating a data list storing a random value; and requesting each of a plurality of clients to add an attribute value stored by the client to the data list and forward the data list using the forwarding path or the forwarding method.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: December 8, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Hisatoshi Yamaoka, Miwa Okabayashi, Eiichi Takahashi, Akira Shiba, Tatsuro Matsumoto
  • Publication number: 20200379832
    Abstract: An information processing apparatus includes: a memory and a processor. The processor, coupled to the memory, is configured to: determine, for each task of a plurality of tasks executed in a distributed stream data processing platform, a log score based on an indication associated with easiness of occurrence of a failure; and output a log message for each task of the plurality of tasks at an output frequency based on a log score of each task and a log score of at least one of an upstream task located upstream of each task and a downstream task located downstream of each task.
    Type: Application
    Filed: May 27, 2020
    Publication date: December 3, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Kota Itakura, Miwa Okabayashi, HISATOSHI YAMAOKA, Eiichi Takahashi, Kazuki Matsui, Tatsuro Matsumoto
  • Publication number: 20200329349
    Abstract: An apparatus performs transmission and reception of messages via which a plurality of services coordinate with each other in a message control system. The apparatus integrates a plurality of messages into a first message, based on relationships between message transmission and message reception caused by the plurality of services, and transmits the first message to another information processing device in the message control system. The apparatus receives a second message integrated by another information processing device, and decompose the received second message into messages including a third message. The apparatus further integrates the decomposed third message and a fourth message into a fifth message, and transfers the integrated fifth message to another information processing device.
    Type: Application
    Filed: April 8, 2020
    Publication date: October 15, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Eiichi Takahashi, HISATOSHI YAMAOKA, Kota Itakura, Miwa Okabayashi, AKIRA SHIBA, Kazuki Matsui, Tatsuro Matsumoto
  • Patent number: 10742430
    Abstract: An information processing apparatus includes a processor. The processor assigns priority levels to respective logics arranged in a chain graph. Each logic is activated by an input event to generate an output event. The processor allocates tokens to the logics based on the priority levels. The processor estimates, for each of the logics, a total number of generated output events to obtain an expected amount of tokens corresponding to the total number. The processor compares, for each of the logics, the expected amount of tokens to an amount of the allocated tokens to determine whether each of the logics has a surplus or a shortage in the allocated tokens. The processor adjusts a frequency of activating each of logics having the shortage. The processor calculates a total amount of the surplus. The processor reallocates the total amount of the surplus to the logics having the shortage.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: August 11, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Hisatoshi Yamaoka
  • Publication number: 20200183740
    Abstract: A computer-implemented data stream processing method includes generating a directed graph in which processes in a stream processing infrastructure are represented by nodes and data input/output relationships between the nodes are represented by edges, calculating a degree of each of the nodes based on a weight of each of the edges, and deploying, based on the calculated degree of each of the nodes, the processes represented by the nodes at stages of a pipeline in the stream processing infrastructure.
    Type: Application
    Filed: December 4, 2019
    Publication date: June 11, 2020
    Applicant: FUJITSU LIMITED
    Inventors: HISATOSHI YAMAOKA, Kazuki Matsui, Tatsuro Matsumoto, Miwa Okabayashi, Naoki Nishiguchi
  • Patent number: 10594632
    Abstract: An information processing apparatus includes a memory and a processor coupled to the memory. The processor is configured to identify a reducible message string by using state transition information. The reducible message string is used to reduce a message string held in a message queue. The state transition information indicates a relationship between a message for executing a service and transition of a state of the service. The processor is configured to detect the reducible message string included in the message string. The processor is configured to reduce the message string held in the message queue by using the reducible message string.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: March 17, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Eiichi Takahashi, Miwa Okabayashi, Akira Shiba, Hisatoshi Yamaoka, Shizuko Ichikawa
  • Patent number: 10530821
    Abstract: A system includes a server including first circuitry and a plurality of terminals, each of which includes second circuitry respectively. The first circuitry is configured to store primes assigned to the plurality of terminals, acquire two or more primes assigned to two or more terminals that and are destinations of contents, calculate a first product of the two or more primes, and transmit first notification data including the first product and the contents to the plurality of terminals. The second circuitry is configured to store an assigned prime, receive the first notification data, determine whether the first product included in the first notification data is divisible by the assigned prime, and acquire, from the first notification data, the contents included in the first notification data based on a result of a determination.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: January 7, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Hisatoshi Yamaoka
  • Publication number: 20190320291
    Abstract: A system for privacy protection includes a processor and a terminal including a location detection device. The processor performs: identifying a presence possible ranges of the terminal at a first time and at a second time earlier than the first time from a combination of information on a first region including the location at the first time, and information on a second region including the location at the second time and having been already transmitted to an external apparatus; determining whether each of the identified presence possible ranges satisfies a preset condition for a presence possible range that may be known by a third party; when the condition is not satisfied, transmitting the information on a third region including the first region and a region other than the first region, as information on a region where the terminal is present at the first time, to the external apparatus.
    Type: Application
    Filed: April 5, 2019
    Publication date: October 17, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Shizuko Ichikawa, Junya Kani, HISATOSHI YAMAOKA, Naoki Nishiguchi, Eiichi Takahashi, Kota Itakura, AKIRA SHIBA, Miwa Okabayashi
  • Patent number: 10425909
    Abstract: An information processing method, performed by a computer, includes: acquiring a beacon signal from a radio circuit coupled to a processor of the computer and configured to receive the beacon signal from a transmission source; calculating a length of a monitoring period, based on time intervals at which the beacon signal is received in a period of duration of a stationary state of the computer; and determining as being out of an area in proximity to the transmission source of the beacon signal in a case where the beacon signal is not received during the monitoring period having the length.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: September 24, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Shizuko Ichikawa, Hisatoshi Yamaoka, Miwa Okabayashi
  • Publication number: 20190250961
    Abstract: An information processing device includes a processor configured to observe an actual load measurement value of each of change target components that have a dependency relationship with each other from among a plurality of components arranged in a distributed processing system. The processor is configured to calculate a load prediction value until completion of a change processing of all of the change target components based on the actual load measurement value of each of the change target components. The processor is configured to adjust a transmission interval of a change instruction for instructing start of the change processing to each unchanged change target component that has not started the change processing when the load prediction value exceeds a predetermined threshold value. The processor is configured to transmit the change instruction to each unchanged change target component that has not started the change processing at the adjusted transmission interval.
    Type: Application
    Filed: February 6, 2019
    Publication date: August 15, 2019
    Applicant: FUJITSU LIMITED
    Inventors: HISATOSHI YAMAOKA, Yasuhiko Kanemasa, Miwa Okabayashi, Riichiro Take, Gaku Nakagawa
  • Publication number: 20190243693
    Abstract: An event processing method includes: storing, upon receipt of a control message representing information indicating a type of an event to be an execution condition for a plug-in and information regarding the plug-in, in association with each other, the information indicating the type of the event specified from the received control message and the plug-in, in association with each other, in a storage unit; and executing the plug-in upon receipt of an event message representing the information indicating the type of the event, the plug-in being stored in the storage unit in association with the information indicating the type of the event specified from the received event message.
    Type: Application
    Filed: January 29, 2019
    Publication date: August 8, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Gaku Nakagawa, Yasuhiko Kanemasa, Riichiro Take, HISATOSHI YAMAOKA, Miwa Okabayashi
  • Publication number: 20190182058
    Abstract: An information processing apparatus includes a processor. The processor assigns priority levels to respective logics arranged in a chain graph. Each logic is activated by an input event to generate an output event. The processor allocates tokens to the logics based on the priority levels. The processor estimates, for each of the logics, a total number of generated output events to obtain an expected amount of tokens corresponding to the total number. The processor compares, for each of the logics, the expected amount of tokens to an amount of the allocated tokens to determine whether each of the logics has a surplus or a shortage in the allocated tokens. The processor adjusts a frequency of activating each of logics having the shortage. The processor calculates a total amount of the surplus. The processor reallocates the total amount of the surplus to the logics having the shortage.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 13, 2019
    Applicant: FUJITSU LIMITED
    Inventor: HISATOSHI YAMAOKA
  • Publication number: 20190132263
    Abstract: An information processing apparatus includes a memory and a processor coupled to the memory. The processor is configured to identify a reducible message string by using state transition information. The reducible message string is used to reduce a message string held in a message queue. The state transition information indicates a relationship between a message for executing a service and transition of a state of the service. The processor is configured to detect the reducible message string included in the message string. The processor is configured to reduce the message string held in the message queue by using the reducible message string.
    Type: Application
    Filed: October 15, 2018
    Publication date: May 2, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Eiichi Takahashi, Miwa Okabayashi, AKIRA SHIBA, HISATOSHI YAMAOKA, Shizuko Ichikawa
  • Patent number: 10193996
    Abstract: A load balancing method executed by an information processing apparatus, the load balancing method includes identifying, in first determination processing for determining circumstances based on an event acquired by a sensor included in the information processing apparatus, a type of an event that another information processing apparatus coupled to the information processing apparatus is able to acquire by using a sensor included in the another information processing apparatus; determining whether a logic tree representing the first determination processing is able to change to another logic tree that includes a partial logic tree determined based on an event of the identified type and is equivalent in condition to the logic tree; and assigning second determination processing represented by the partial logic tree included in the another logic tree to the another information processing apparatus, when determining that the logic tree is able to change to the another logic tree.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: January 29, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Hisatoshi Yamaoka, Takashi Imai, Toru Kamiwada
  • Publication number: 20190005116
    Abstract: An information processing apparatus, includes: a memory; and a processor coupled to the memory, wherein the processor: refers to actual result data of first events transmitted from a sensor; removes, from the actual result data, second events in which a sensor value belongs to a region of interest of a pass filter used for filtering; and generates, based on a number of third events in one or more clusters of distribution of the second events, a cut filter including a region of interest corresponding to a shape of the one or more clusters.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 3, 2019
    Applicant: FUJITSU LIMITED
    Inventors: HISATOSHI YAMAOKA, Miwa Okabayashi
  • Publication number: 20180287810
    Abstract: An information processing apparatus including: a memory, and a processor coupled to the memory and configured to perform a process including: setting a forwarding path or a forwarding method; creating a data list storing a random value; and requesting each of a plurality of clients to add an attribute value stored by the client to the data list and forward the data list using the forwarding path or the forwarding method.
    Type: Application
    Filed: March 27, 2018
    Publication date: October 4, 2018
    Applicant: FUJITSU LIMITED
    Inventors: HISATOSHI YAMAOKA, Miwa Okabayashi, Eiichi Takahashi, AKIRA SHIBA, Tatsuro Matsumoto
  • Publication number: 20180248888
    Abstract: An information processing apparatus includes a processor that executes a process including calculating, for each of a plurality of registered users from which feature values have been obtained in advance, an index value indicating a probability of an authentication target being that registered user based on a matching degree between a feature value extracted from authentication information obtained from the authentication target and a feature value of that registered user, setting a synthesized access right by synthesizing, based on the index value, an access right of a certain one of the plurality of users to a plurality of resources and an access right of a user different from the certain registered user from among the plurality of registered users to the plurality of resources, and permitting the authentication target an access to a resource to which an access is permitted in the synthesized access right.
    Type: Application
    Filed: January 29, 2018
    Publication date: August 30, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Eiichi Takahashi, Miwa Okabayashi, AKIRA SHIBA, HISATOSHI YAMAOKA
  • Publication number: 20180132126
    Abstract: An information processing apparatus for connecting to a terminal via a first wireless communication medium and connecting to a network via a second wireless communication medium, the information processing apparatus including: a memory, and a processor coupled to the memory and configured to execute a process comprising; receiving data to the terminal from the network via the second wireless communication medium; caching the received data; selecting a node device to be a copy destination of the cached data out of the other node devices based on a prospect of the terminal to be reconnected to each of the other node devices and a communication load of the own node device for transmitting data to each of the other node devices; and transmitting the data to the selected node device via the first wireless communication medium.
    Type: Application
    Filed: October 20, 2017
    Publication date: May 10, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Hisatoshi YAMAOKA, Miwa Okabayashi