Patents by Inventor Hisaya Sakamoto
Hisaya Sakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7769304Abstract: A signal processing apparatus sets a discrimination level most suitably, regardless of whether the apparatus is in the minimum receiving system or the maximum receiving system. The apparatus comprises a light receiving unit converting input signal light to an electric signal, and a level detecting unit for detecting a high level component and a low level component of the electric signal from the light receiving unit, along with peak levels on a high-side and a low-side of the electric signal.Type: GrantFiled: December 27, 2006Date of Patent: August 3, 2010Assignee: Fujitsu LimitedInventors: Hisaya Sakamoto, Toru Yamazaki, Yoshito Anazawa, Hiroshi Kuzukami
-
Publication number: 20100046963Abstract: An optical regenerating apparatus includes a photoreceiver unit that receives an optical signal and converts the optical signal into an electrical signal; a reproducing unit that identifies a code of the electrical signal by comparing the electrical signal with a threshold, and reproduces and outputs the identified code; a threshold adjusting unit that calculates a threshold that is lower than the central value of the amplitude of the electrical signal and according to the calculated threshold, adjusts the threshold at the reproducing unit; and a control unit that, based on a variation in the power of the electrical signal, controls the adjustment of the threshold by the threshold adjusting unit.Type: ApplicationFiled: September 28, 2009Publication date: February 25, 2010Applicant: FUJITSU LIMITEDInventors: Masaru Akizawa, Hisaya Sakamoto
-
Publication number: 20080037997Abstract: The invention provides an optical sending apparatus which improves the characteristics near zero dispersion without sacrificing the characteristics at high dispersion in an optical duo binary scheme. The apparatus comprises an optical modulation sending unit, a driving signal processing unit, and a modulation operation switch-over unit for switching over the modulation operation so as to switch over the modulation waveform modulated in intensity in the optical modulation sending unit, in either a first modulation waveform in which the intensity of modulated light to the median value of the duo binary signal is minimum and the intensity of modulated light to other two values of the duo binary signal is maximum, and a second modulation waveform in which the intensity of modulated light to the median value of the duo binary signal is maximum and the intensity of modulated light to other two values of the duo binary signal is minimum.Type: ApplicationFiled: March 12, 2007Publication date: February 14, 2008Inventors: Toru Yamazaki, Hisaya Sakamoto
-
Patent number: 7245837Abstract: A demultiplex unit demultiplexes the optical output of a Mach-Zehnder optical modulator and inputs the demultiplexed optical output to a wavelength detection unit. The wavelength detection unit detects the wavelength deviations in the ascending or descending part of the optical signal and inputs the wavelength deviations to a detection unit. The detection unit detects the sign and magnitude of chirping in the magnitude of wavelength deviation and inputs the sign and magnitude of chirping to a driving voltage control unit. The driving voltage control unit compares the detected sign and amount of chirping with the target sign and magnitude of chirping, and a driving voltage generation circuit provides the Mach-Zehnder optical modulator with a suitable driving voltage.Type: GrantFiled: February 20, 2003Date of Patent: July 17, 2007Assignee: Fujitsu LimitedInventors: Hisaya Sakamoto, Toru Yamazaki, Rumiko Tashiro
-
Publication number: 20070146795Abstract: A signal processing apparatus sets a discrimination level most suitably, regardless of whether the apparatus is in the minimum receiving system or the maximum receiving system. The apparatus comprises a light receiving unit converting input signal light to an electric signal, and a level detecting unit for detecting a high level component and a low level component of the electric signal from the light receiving unit, along with peak levels on a high-side and a low-side of the electric signal.Type: ApplicationFiled: December 27, 2006Publication date: June 28, 2007Applicant: FUJITSU LIMITEDInventors: Hisaya Sakamoto, Toru Yamazaki, Yoshito Anazawa, Hiroshi Kuzukami
-
Patent number: 6707024Abstract: A bias circuit for a photodetector by the present invention provides a bias voltage to the photodetector that performs electric current amplification according to the bias voltage supplied, and is characterized by comprising a power node and an auto-bias circuit that changes a time constant of the bias circuit for the photodetector according to an optical power received by the photodetector, the auto-bias circuit being connected between the power node and the photodetector, thereby reliability of operation of the photodetector is enhanced.Type: GrantFiled: December 6, 2001Date of Patent: March 16, 2004Assignee: Fujitsu LimitedInventors: Yoshinobu Miyamoto, Nobuaki Sato, Setsuo Misaizu, Hisaya Sakamoto, Akimitsu Miyazaki
-
Publication number: 20040033082Abstract: A demultiplex unit demultiplexes the optical output of a Mach-Zehnder optical modulator and inputs the demultiplexed optical output to a wavelength detection unit. The wavelength detection unit detects the wavelength deviations in the ascending or descending part of the optical signal and inputs the wavelength deviations to a detection unit. The detection unit detects the sign and magnitude of chirping in the magnitude of wavelength deviation and inputs the sign and magnitude of chirping to a driving voltage control unit. The driving voltage control unit compares the detected sign and amount of chirping with the target sign and magnitude of chirping, and a driving voltage generation circuit provides the Mach-Zehnder optical modulator with a suitable driving voltage.Type: ApplicationFiled: February 20, 2003Publication date: February 19, 2004Applicant: Fujitsu LimitedInventors: Hisaya Sakamoto, Toru Yamazaki, Rumiko Tashiro
-
Patent number: 6694273Abstract: In a receiving apparatus, there are included a compensation characteristic variable type waveform degradation compensating unit capable of compensating for waveform degradation of a received signal stemming from a transmission line, a received waveform measuring unit for measuring waveform data on the received signal (which will be referred to hereinafter as “received waveform data), and a control unit for controlling a compensation characteristic of the waveform degradation compensating unit to minimize a difference between frequency data on the received signal, obtained by converting the received waveform data acquired by the received waveform measuring unit into a frequency domain, and frequency data on a reference waveform free from waveform degradation. With this configuration, certain compensation for the waveform degradation of the received signal stemming from chromatic dispersion or the like becomes feasible without using a dispersion compensation fiber.Type: GrantFiled: August 22, 2001Date of Patent: February 17, 2004Assignee: Fujitsu LimitedInventors: Takashi Kurooka, Hisaya Sakamoto, Akimitsu Miyazaki, Tomoyuki Otsuka
-
Patent number: 6643472Abstract: An APD bias circuit includes an APD, an equalizer amplifier receiving an output signal of the APD, and first, second and third resistors connected in series to the APD to which a bias voltage is applied therethrough. A bias control circuit is connected to a first node between the first and second resistors, and receives a current from the first node so that a voltage of the first node can be maintained at a constant level. A first capacitor is connected between a ground and a second node between the second and third resistors. A second capacitor is connected between the ground and a third node between the third resistor and the APD. A first time constant defined by the second resistor and the first capacitor is greater than a second time constant defined by the third resistor and the second capacitor.Type: GrantFiled: February 18, 2000Date of Patent: November 4, 2003Assignee: Fujitsu LimitedInventors: Hisaya Sakamoto, Tetsuya Kiyonaga, Takashi Kurooka, Akimitsu Miyazaki, Nobuaki Sato
-
Publication number: 20020123851Abstract: In a receiving apparatus, there are included a compensation characteristic variable type waveform degradation compensating unit capable of compensating for waveform degradation of a received signal stemming from a transmission line, a received waveform measuring unit for measuring waveform data on the received signal (which will be referred to hereinafter as “received waveform data), and a control unit for controlling a compensation characteristic of the waveform degradation compensating unit to minimize a difference between frequency data on the received signal, obtained by converting the received waveform data acquired by the received waveform measuring unit into a frequency domain, and frequency data on a reference waveform free from waveform degradation. With this configuration, certain compensation for the waveform degradation of the received signal stemming from chromatic dispersion or the like becomes feasible without using a dispersion compensation fiber.Type: ApplicationFiled: August 22, 2001Publication date: September 5, 2002Applicant: Fujitsu LimitedInventors: Takashi Kurooka, Hisaya Sakamoto, Akimitsu Miyazaki, Tomoyuki Otsuka
-
Publication number: 20020043614Abstract: A bias circuit for a photodetector by the present invention provides a bias voltage to the photodetector that performs electric current amplification according to the bias voltage supplied, and is characterized by comprising a power node and an auto-bias circuit that changes a time constant of the bias circuit for the photodetector according to an optical power received by the photodetector, the auto-bias circuit being connected between the power node and the photodetector, thereby reliability of operation of the photodetector is enhanced.Type: ApplicationFiled: December 6, 2001Publication date: April 18, 2002Inventors: Yoshinobu Miyamoto, Nobuaki Sato, Setsuo Misaizu, Hisaya Sakamoto, Akimitsu Miyazaki
-
Patent number: 6188738Abstract: Disclosed is a clock extraction circuit for extracting a clock signal which furnishes timing for discriminating a data signal, from the data signal. The clock extraction circuit has a timing extraction unit for extracting the clock signal from the data signal, and a filter, which is provided in front of the timing extraction unit, having an upper limited frequency sufficiently lower than the bit rate of the data. The data signal is input to the timing extraction unit via the filter.Type: GrantFiled: March 13, 1998Date of Patent: February 13, 2001Assignee: Fujitsu LimitedInventors: Hisaya Sakamoto, Akihiko Sugata, Akimitsu Miyazaki, Tetsuya Kiyonaga
-
Patent number: 6065129Abstract: A clock signal detection circuit includes a diode to which a clock signal is applied as an input. If a voltage VD IN on the anode side of the diode is greater than a voltage VD OUT on the cathode side, the clock signal is fed into a transmission line and arrives at a reflecting load upon elapse of a prescribed delay time. When the voltage VD IN on the anode side of the diode becomes smaller than the voltage VD OUT on the cathode side, the clock signal is reflected by the reflecting load and returns to the cathode of the diode through the transmission line. This introduction and reflection of the clock signal is repeated at the clock signal period so that the amplitude on the output side of the diode is enlarged, thereby making it possible to obtain, from an averaging circuit, a clock detection voltage substantially equal to the amplitude value of the clock signal.Type: GrantFiled: June 3, 1998Date of Patent: May 16, 2000Assignee: Fujitsu LimitedInventors: Hisaya Sakamoto, Akihiko Sugata, Tetsuya Kiyonaga, Akimitsu Miyazaki
-
Patent number: 5736875Abstract: In controlling a discrimination level V.sub.1, V.sub.1 is controlled so that discrimination results based on discrimination levels V.sub.1 +.DELTA.V and V.sub.1 -.DELTA.V each become equal to the discrimination result based on the discrimination level V.sub.1. If the discrimination result based on V.sub.1 +.DELTA.V does not agree with the discrimination result based on V.sub.1, V.sub.1 is lowered, and if the discrimination result based on V.sub.1 -.DELTA.V does not agree with the discrimination result based on V.sub.1, V.sub.1 is raised. In controlling a discrimination phase .PHI..sub.1, .PHI..sub.1 is controlled so that discrimination results based on discrimination phases .PHI..sub.1 +.DELTA..PHI. and .PHI..sub.1 -.DELTA..PHI. each become equal to the discrimination result based on the discrimination phase .PHI..sub.1. If the discrimination result based on .PHI..sub.1 +.DELTA..PHI. does not agree with the discrimination result based on .PHI..sub.1, .PHI..sub.Type: GrantFiled: March 20, 1996Date of Patent: April 7, 1998Assignee: Fujitsu LimitedInventors: Hisaya Sakamoto, Takashi Tsuda, Yasunori Nagakubo
-
Patent number: 5625181Abstract: A light receipt system has a bias circuit and a light-receipt element. The bias circuit controls light input power to the light-receipt element to the optimum multiplication factor. The bias circuit of the light-receipt element has a first resistor, a second resistor, and a third resistor. The first resistor and the second resistor are connected in parallel, and the light-receipt element is connected between a connection of the first resistor and the second resistor, and the third resistor. A bypass current path is provided, connected to a junction point between the first resistor and the second resistor.Type: GrantFiled: August 10, 1994Date of Patent: April 29, 1997Assignee: Fujitsu LimitedInventors: Akihiko Yasuda, Setsuo Misaizu, Hisaya Sakamoto, Yuji Miyaki, Norio Nagase, Hiroshi Kuzukami