Patents by Inventor Hisaya Takahashi
Hisaya Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100054673Abstract: An optical connector 1 is for connecting a connection object 10 to an optical module 21. A slider 3 is slidably held by a housing 2 adapted for positioning the connection object and the optical module. The housing has a first positioning portion for receiving the connection object. The slider has a first pressing portion 3a for elastically pressing the connection object in a first direction toward the first positioning portion and a second pressing portion 3e that elastically acts in a second direction perpendicular to the first direction.Type: ApplicationFiled: January 25, 2008Publication date: March 4, 2010Inventors: Yuichi Koreeda, Hikaru Kouta, Kaichiro Nakano, Hisaya Takahashi, Takashi Ohtsuka, Hideyuki Ono
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Publication number: 20100002999Abstract: In an optical connector adapter for use in connecting a first and a second optical connector plug to each other, a second adapter half is butted against a first adapter half in a predetermined direction. The first and second adapter halves have engaging means for maintaining the first and second adapter halves in a butted state in the predetermined direction. The engaging means is configured to be disposed inside the optical connector adapter and to be prevented from releasing engagement thereof by at least one of the first and second optical connector plugs.Type: ApplicationFiled: July 6, 2009Publication date: January 7, 2010Inventors: Naoki Katagiyama, Yuichi Koreeda, Hikaru Kouta, Hisaya Takahashi, Mikio Oda, Hideyuki Ono
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Publication number: 20090232443Abstract: Optical elements (light sources 16 or photodetectors 18) are arranged in a two-dimensional array, and the relative positional relationship between the optical elements and optical waveguides 12 is defined such that optical waveguides 12 extend between the optical elements in the two-dimensional array substantially parallel to substrate 19 for increased parallelism. Micromirrors 15 are disposed in respective optical waveguides 12 to bend light beams through 90 degrees to realize a highly efficient optical coupling between the optical elements and optical waveguides 12. The optical waveguides are stacked in multiple stages, and light beams are lead to the optical waveguides in the multiple stacks through micromirrors 15 across the stacked plane of the optical waveguides, thereby realizing parallel connection between the two-dimensional array of optical elements and a two-dimensional array of optical waveguides.Type: ApplicationFiled: February 28, 2006Publication date: September 17, 2009Applicants: NEC CORPORATION, TOKYO INSTITUTE OF TECHNOLOGYInventors: Mikio Oda, Hikaru Kouta, Kaichirou Nakano, Hisaya Takahashi, Kohroh Kobayashi
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Publication number: 20090121601Abstract: Provided herein is a light-emitting apparatus which is capable of causing the light emitted at the entire face of a fluorescent material to be exteriorly emitted with no interference and with enhanced light emission efficiency, thereby attaining an exteriorly radiated high brightness light. A cathode electrode 10 is mounted on a periphery of a transmission member 30, the anode electrode 15 is also mounted on a domain opposite to a light transmission member 30, and the surface 16a of the fluorescent material 16 to be mounted on a top layer of the anode electrode 15 is formed with a concave face.Type: ApplicationFiled: November 6, 2008Publication date: May 14, 2009Applicant: Fuji Jukogyo Kabushiki KaishaInventors: Hisaya TAKAHASHI, Toshiya ARAKAWA, Atsushi NAMBA, Mikio ONO
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Publication number: 20090097256Abstract: Provided herein is a light-emitting apparatus capable of achieving both improved durability and higher brightness with an inexpensive and simple construction. A heat resistant glass substrate 51 is mounted in a vacuum chamber 5, and while an anode electrode 8 (and a light emitter 20) is mounted on the glass substrate, the glass substrate 51 is separated from a glass substrate 11. This precisely protects the vacuum chamber 5 from thermal damage due to light emission upon excitation, even when the current density between the cathode electrode 6 and the anode electrode 8 is controlled at a high level to cause the light emitter 20 to emit light at high brightness.Type: ApplicationFiled: October 13, 2008Publication date: April 16, 2009Applicant: FUJI JUKOGYO KABUSHIKI KAISHAInventors: Hisaya TAKAHASHI, Atsushi NAMBA, Toshiya ARAKAWA, Mikio ONO
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Publication number: 20090051266Abstract: An electron emitting source 6 is covered with a cathode mask 20 whose opening areas are substantially the same as those in a grid electrode 10, so that the areas for which the electrons are emitted from the electron emitting source 6 can substantially be the same as the opening areas in the grid electrode 10. Thus, substantially all the electrons emitted from these areas can be ensured to pass through opening portions 11 in the grid electrode 10 so as to be effective electrons that can contribute to light emission. In this way, power loss at the grid electrode 10 can be reduced. At the same time, harmful metallic sputtering caused at the grid electrode 10 toward a cathode electrode 5 can be reliably prevented, whereby damages on the cathode electrode can be avoided.Type: ApplicationFiled: April 4, 2006Publication date: February 26, 2009Inventors: Hisaya Takahashi, Atsushi Namba, Miyuki Kobayashi
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Publication number: 20090026565Abstract: The present invention includes: photoelectric conversion element 103 that converts electrical signals into optical signals and optical signals into electrical signals; and optical communication LSI 102 electrically connected to photoelectric conversion element 103. Also, the present invention includes electrical wiring substrate 101 including a plurality of electrodes 201 and 202 on which photoelectric conversion element 103 and optical communication LSI 102 are mounted by flip-chip attachment and a plurality of wiring layers 101a, 101b and 101c electrically connecting respective electrodes 201 and 202, wiring layers 101a, 101b and 101c being provided at an upper surface, a lower surface and an inner portion of electrical wiring substrate 101, respectively. Also, electrodes 201 and 202 to which photoelectric conversion element 103 is bonded are provided at a side surface of electrical wiring substrate 101.Type: ApplicationFiled: February 2, 2007Publication date: January 29, 2009Inventors: Arihide Noda, Mikio Oda, Takashi Ohtsuka, Hisaya Takahashi, Hikaru Kouta, Jun Sakai
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Publication number: 20090009056Abstract: A light emitting apparatus capable of efficiently generating high luminance white light is provided. The present invention permits white light to be generated, without using low-emission efficiency white light emitters, by forming a light emitter layer 16 using a high-light emission efficiency blue light emitter and yellow light emitter. In this case, having at least a part of the blue light emitter particles 17 and at least a part of the yellow light emitter particles 18 exposed at a surface of the light emitter layer 16, respectively, allows both of such particles to be directly bombarded with electrons, thereby effecting a highly efficient electron excitation.Type: ApplicationFiled: July 3, 2008Publication date: January 8, 2009Applicants: FUJI JUKOGYO KABUSHIKI KAISHA, SHOEI CHEMICAL INC.Inventors: Atsushi NAMBA, Toshiya ARAKAWA, Kunio NAKAZATO, Hisaya TAKAHASHI, Tadashi ENDO, Goro YAMAGUCHI, Mineto IWASAKI
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Publication number: 20080084157Abstract: The object of the invention is to radiate light towards the outside, improve the luminous efficiency and obtain a high-intensity externally radiated light without hindering the light from being emitted on the entire surface of a phosphor layer. A glass substrate 2, that forms a light projection window, and a glass substrate 3, that forms a base bottom surface, are oppositely disposed at a predetermined interval to form a vacuum chamber, an anode electrode 5 is provided at a region at the center of the glass substrate 3, and a cathode electrode 6 is provided at a region on both sides of the anode electrode 5. A phosphor layer 7 is formed as a film on the anode electrode 5, an electron emission source 8 is formed as a film on the cathode electrode 6, and a gate electrode 9 is arranged above the electron emission source 8.Type: ApplicationFiled: October 4, 2007Publication date: April 10, 2008Applicant: FUJI JUKOGYO KABUSHIKI KAISHAInventors: Hisaya TAKAHASHI, Atsushi NAMBA, Fujio MATSUI
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Patent number: 7333683Abstract: An LSI package having an optical interface is mounted on a surface of a photoelectric wiring board. The photoelectric wiring board and the optical interface are optically connected with sufficient precision. A wiring board side guide member including socket pins and guide pins is soldered and fixed onto the photoelectric wiring board including an optical transmission line, a guide pin, and a mirror. An optical interface side guide member having a fitting hole is glued to the optical interface. The optical interface is mounted on an interposer of the LSI package. The guide pin of the photoelectric wiring board is fitted into the fitting hole formed through the interposer. The guide pin of the guide member is fitted into the fitting hole of the guide member. As a result, position alignment between the optical interface and the photoelectric wiring board is conducted with high precision.Type: GrantFiled: October 7, 2005Date of Patent: February 19, 2008Assignee: NEC CorproationInventors: Junichi Sasaki, Ichiro Hatakeyama, Kazunori Miyoshi, Hikaru Kouta, Kaichiro Nakano, Mikio Oda, Hisaya Takahashi, Mitsuru Kurihara
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Publication number: 20070262699Abstract: A light-emitting apparatus of the present invention maintains an anode electrode 5 at a higher positive electric potential than a cathode electrode 15, applies an electric field to a cold-cathode electron emission source 16 by controlling a gate voltage applied to the cathode electrode 15 with a gate electrode 10, and emits excitation light from a phosphor 6 irradiated by an electron beam released from the cold-cathode electron emission source 16. The light-emitting apparatus of this invention emits the excitation light not only from the opposite side of the electron beam-irradiated surface of the phosphor 6 through a glass substrate 2, but also from the electron bean-irradiated surface of the phosphor 6 by reflecting the excitation light with a gate reflection surface 12 on the gate electrode 10 and emitting it through an unobstructed area Ro of the glass substrate 2.Type: ApplicationFiled: May 9, 2007Publication date: November 15, 2007Applicant: FUJI JUKOGYO KABUSHIKI KAISHAInventors: Hisaya TAKAHASHI, Atsushi NAMBA
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Publication number: 20070165979Abstract: Photodetectors 2a capable of converting optical signals that are received as input from the outside to electrical signals and supplying these electrical signals as output to output ports are mounted on two or more input ports of substrate 1 on which a semiconductor integrated circuit can be mounted; and moreover, the heights of these two or more photodetectors 2a are uniformly aligned, and the electrical signal input ports of the semiconductor integrated circuit that is mounted can be connected to the output ports of the above-described substrate 1.Type: ApplicationFiled: October 14, 2004Publication date: July 19, 2007Inventors: Mikio Oda, Hisaya Takahashi, Kaichiro Nakano, Hikaru Kouta, Kohroh Kobayashi
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Publication number: 20070164297Abstract: Light-emitting device array 2 is mounted on LSI 1, following which necessary light-emitting devices 2a among two or more light-emitting devices 2 that make up mounted light-emitting device array 2 are allowed to remain and unnecessary light-emitting devices 2a are removed in order to mount light-emitting devices on a plurality of output ports that are randomly arranged on LSI 1.Type: ApplicationFiled: October 14, 2004Publication date: July 19, 2007Inventors: Mikio Oda, Hisaya Takahashi, Kaichiro Nakano, Hikaru Kouta, Kohroh Kobayashi
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Patent number: 7154926Abstract: Submount substrates are connected to both sides of a laser diode via hard solders. The lower submount substrate and a heat sink are connected together by a soft solder. The heat sink and a presser electrode are fixed with a predetermined gap therebetween via an insulating spacer. A coil electrode is fitted in a V-shaped groove of the presser electrode. As the coil electrode is deformed slightly elastically, the coil electrode is pressed against the upper submount substrate.Type: GrantFiled: September 17, 2004Date of Patent: December 26, 2006Assignee: Laserfront Technologies, Inc.Inventors: Hikaru Kouta, Hisaya Takahashi, Hideyuki Ono, Yuuzou Ikeda, Masaki Tunekane, Toshinori Ishida, Keiichi Kubota
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Publication number: 20060215715Abstract: A pair of opening portions are provided as an inlet port of refrigerant and an outlet port thereof, and refrigerant flow channels are formed left-right symmetrically in its plan view from one opening portion to the other opening portion. At the area adjusted to the area which is thermally connected to the heating element in the refrigerant flow channels, projections whose cross section thereof become smaller and smaller upward from the bottom surface of the refrigerant flow channels or downward from the upper surface, that is, widens toward the end, are formed. By joining the heat radiating plate having the projections formed therein to the other heat radiating plate, which is plate-shaped, together, a heat sink is assembled. Therefore, the heat sinks are excellent in terms of thermal conductivity and reliability, are produced at a low cost, and a laser module employing the same, a laser module apparatus, and a laser processing apparatus are obtainable.Type: ApplicationFiled: February 18, 2004Publication date: September 28, 2006Inventors: Hikaru Kouta, Hisaya Takahashi, Kazuyuki Mikubo, Hideyuki Ono, Masaki Tsunekane, Toshinori Ishida, Keiichi Kubota
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Publication number: 20060078248Abstract: An LSI package having an optical interface is mounted on a surface of a photoelectric wiring board. The photoelectric wiring board and the optical interface are optically connected with sufficient precision. A wiring board side guide member including socket pins and guide pins is soldered and fixed onto the photoelectric wiring board including an optical transmission line, a guide pin, and a mirror. An optical interface side guide member having a fitting hole is glued to the optical interface. The optical interface is mounted on an interposer of the LSI package. The guide pin of the photoelectric wiring board is fitted into the fitting hole formed through the interposer. The guide pin of the guide member is fitted into the fitting hole of the guide member. As a result, position alignment between the optical interface and the photoelectric wiring board is conducted with high precision.Type: ApplicationFiled: October 7, 2005Publication date: April 13, 2006Applicant: NEC CORPORATIONInventors: Junichi Sasaki, Ichiro Hatakeyama, Kazunori Miyoshi, Hikaru Kouta, Kaichiro Nakano, Mikio Oda, Hisaya Takahashi, Mitsuru Kurihara
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Publication number: 20050069266Abstract: Submount substrates are connected to both sides of a laser diode via hard solders. The lower submount substrate and a heat sink are connected together by a soft solder. The heat sink and a presser electrode are fixed with a predetermined gap therebetween via an insulating spacer. A coil electrode is fitted in a V-shaped groove of the presser electrode. As the coil electrode is deformed slightly elastically, the coil electrode is pressed against the upper submount substrate.Type: ApplicationFiled: September 17, 2004Publication date: March 31, 2005Inventors: Hikaru Kouta, Hisaya Takahashi, Hideyuki Ono, Yuuzou Ikeda, Masaki Tunekane, Toshinori Ishida, Keiichi Kubota
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Patent number: 6607981Abstract: A method for forming a Cu interconnect pattern on a ZnO film of a printed circuit board without using a metallic catalyst on the ZnO film includes the steps of replacing Zn in the ZnO film by Cu in an aqueous solution of copper sulfate to form a CuO film, reducing the CuO in the CuO film to Cu in an aqueous solution of hydrogenated boron potassium to form a metallic Cu film, and plating the metallic Cu film with a plating Cu film in a plating liquid. The absence of the metallic catalyst improves the insulation resistance of the Cu interconnect pattern in the printed circuit board.Type: GrantFiled: September 7, 2000Date of Patent: August 19, 2003Assignees: NEC Corporation, Osaka Municipal GovernmentInventors: Hisaya Takahashi, Hirofumi Nakamura, Masanobu Izaki, Junichi Katayama
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Patent number: 6563057Abstract: In a multilayer printed circuit board having a conductor pattern, covered with an insulation layer having via holes, these via holes are filled with a conductor by means of electroless nickel plating or electroless copper plating.Type: GrantFiled: February 9, 2000Date of Patent: May 13, 2003Assignee: NEC Toppan Circuit Solutions, Inc.Inventors: Sinichi Hotta, Hisaya Takahashi
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Publication number: 20020112885Abstract: In a multilayer printed circuit board having a conductor pattern, covered with an insulation layer having via holes, these via holes are filled with a conductor by means of electroless nickel plating or electroless copper plating.Type: ApplicationFiled: February 9, 2000Publication date: August 22, 2002Inventors: Sinichi Hotta, Hisaya Takahashi