Patents by Inventor Hisayuki Miki

Hisayuki Miki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190267513
    Abstract: To provide a light-emitting diode in which cracking or peeling of interlayer insulating film is suppressed. The first interlayer insulating film is continuously formed in a film on a DBR layer, a first p-electrode, and a first n-electrode. The first interlayer insulating film is a multilayer formed by alternately depositing a SiO2 layer and a TiO2 layer, and the number of layers is eleven. The SiO2 layer is formed of a material having a property of generating compressive stress. When the light-emitting diode according to the first embodiment is exposed to a high temperature, the TiO2 layer in the first interlayer insulating film changes its property from generating compressive stress to generating tensile stress. The tensile stress by the TiO2 layer and the compressive stress by the SiO2 layer counteract each other. As a result, the internal stress of the first interlayer insulating film is relaxed.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 29, 2019
    Inventors: Ryoki Kamada, Shinichi Matsui, Hideki Omoya, Hisayuki Miki
  • Patent number: 10128411
    Abstract: A light-emitting element includes an n-type semiconductor layer mainly including AlxGa1?XN (0.5?x?1), a p-type semiconductor layer, a light-emitting layer sandwiched between the n-type semiconductor layer and the p-type semiconductor layer, an n-electrode connected to the n-type semiconductor layer, and a plurality of p-electrodes that are connected to the p-type semiconductor layer and are arranged in a dot pattern. An area of the n-electrode is not less than 25% and not more than 50% of a chip area.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: November 13, 2018
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Yasuhiro Takenaka, Yoshiki Saito, Shinichi Matsui, Daisuke Shinoda, Hisayuki Miki, Hironao Shinohara
  • Publication number: 20180083164
    Abstract: A light-emitting element includes an n-type semiconductor layer mainly including AlxGa1-XN (0.5?x?1), a p-type semiconductor layer, a light-emitting layer sandwiched between the n-type semiconductor layer and the p-type semiconductor layer, an n-electrode connected to the n-type semiconductor layer, and a plurality of p-electrodes that are connected to the p-type semiconductor layer and are arranged in a dot pattern. An area of the n-electrode is not less than 25% and not more than 50% of a chip area.
    Type: Application
    Filed: July 6, 2017
    Publication date: March 22, 2018
    Inventors: Yasuhiro TAKENAKA, Yoshiki SAITO, Shinichi MATSUI, Daisuke SHINODA, Hisayuki MIKI, Hironao SHINOHARA
  • Publication number: 20180083163
    Abstract: A method of manufacturing a light-emitting device includes forming by sputtering a nucleation layer mainly including AlN on a surface of a patterned substrate including a concave-convex pattern, after forming the nucleation layer, performing a heat treatment at a temperature of not less than 1150° C., after the heat treatment, forming an AlGaN underlayer on the surface of the patterned substrate with the nucleation layer formed thereon, the AlGaN underlayer mainly including AlxGa1?xN (0.04?x?1) and a flat surface, and epitaxially growing a group III nitride semiconductor on the AlGaN underlayer so as to form a light-emitting function portion including a light-emitting layer.
    Type: Application
    Filed: July 24, 2017
    Publication date: March 22, 2018
    Inventors: Yoshiki SAITO, Daisuke SHINODA, Akira TANEICHI, Hisayuki MIKI, Kazutaka YOSHIMURA
  • Patent number: 9040319
    Abstract: A group-III nitride compound semiconductor light-emitting device, a method of manufacturing the group-III nitride compound semiconductor light-emitting device, and a lamp. The method includes the steps of: forming an intermediate layer (12) made of a group-III nitride compound on a substrate (11) by activating and reacting gas including a group-V element with a metal material in plasma; and sequentially forming an n-type semiconductor layer (14), a light-emitting layer (15), and a p-type semiconductor layer (16) each made of a group-III nitride compound semiconductor on the intermediate layer (12). Nitrogen is used as the group-V element, and the thickness of the intermediate layer (12) is in the range of 20 to 80 nm.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: May 26, 2015
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Yasunori Yokoyama, Hisayuki Miki
  • Patent number: 8927348
    Abstract: Provided are a method of manufacturing a group-III nitride semiconductor light-emitting device in which a light-emitting device excellent in the internal quantum efficiency and the light extraction efficiency can be obtained, a group-III nitride semiconductor light-emitting device and a lamp. Included are an epitaxial step of forming a semiconductor layer (30) so as to a main surface (20) of a substrate (2), a masking step of forming a protective film on the semiconductor layer (30), a semiconductor layer removal step of removing the protective film and the semiconductor layer (30) by laser irradiation to expose the substrate (2), a grinding step of reducing the thickness of the substrate (2), a polishing step of polishing the substrate (2), a laser processing step of providing processing marks to the inside of the substrate (2), a division step of creating a plurality of light-emitting devices (1) while forming a division surface of the substrate (2) to have a rough surface.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: January 6, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Susumu Sugano, Hisayuki Miki, Hironao Shinohara
  • Patent number: 8882971
    Abstract: A sputtering apparatus (1) includes: a chamber (10) having an inside maintained in a depressurized state to generate plasma discharge (20); a cathode (22) placed in the chamber (10) and holding a target (21); and a substrate holder (60) holding a substrate (110) so that one surface of the substrate (110) faces the surface of the target (21). The substrate (110) is arranged at an upper portion in the sputtering apparatus (1) with the surface of the substrate (110) facing downward. The target (21) is arranged at a lower portion in the sputtering apparatus (1) with the surface of the target (21) facing upward. The sputtering apparatus (1) includes a heater (65) for heating the substrate (110). The temperature of the substrate (110) is raised by absorbing electromagnetic waves radiated from the heater (65). A method of manufacturing a semiconductor light-emitting element using the sputtering apparatus is also disclosed.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: November 11, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Kenzo Hanawa, Yasunori Yokoyama, Yasumasa Sasaki
  • Patent number: 8866186
    Abstract: The present invention aims to enhance the light extraction efficiency of the Group III nitride semiconductor light-emitting device. The inventive Group III nitride semiconductor light-emitting device comprises a substrate; and a Group III nitride semiconductor layer including a light-emitting layer, stacked on the substrate, wherein the side face of the Group III nitride semiconductor layer is tilted with respect to the normal line of the major surface of the substrate.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: October 21, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Gaku Oriji, Koji Kamei, Hisayuki Miki, Akihiro Matsuse
  • Patent number: 8802187
    Abstract: The present invention provides a method of manufacturing a solar cell, comprising forming a buffer layer comprising a group-III nitride semiconductor on a substrate using a sputtering method, and forming a group-III nitride semiconductor layer and electrodes on the buffer layer. The group-III nitride semiconductor layer is formed on the buffer layer by at least one selected from the group consisting of the sputtering method, a MOCVD method, an MBE method, a CBE method, and an MLE method, and the electrodes are formed on the group-III nitride semiconductor layer.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: August 12, 2014
    Assignee: Showa Denko K.K.
    Inventors: Yoshiaki Ikenoue, Hisayuki Miki, Kenzo Hanawa, Yasumasa Sasaki, Hitoshi Yokouchi, Ryoko Konta, Hiroaki Kaji
  • Patent number: 8765507
    Abstract: A method for manufacturing a Group III nitride semiconductor of the present invention includes a sputtering step of forming a single-crystalline Group III nitride semiconductor on a substrate by a reactive sputtering method in a chamber in which a substrate and a Ga element-containing target are disposed, wherein said sputtering step includes respective substeps of: a first sputtering step of performing a film formation of the Group III nitride semiconductor while setting the temperature of the substrate to a temperature T1; and a second sputtering step of continuing the film formation of the Group III nitride semiconductor while lowering the temperature of the substrate to a temperature T2 which is lower than the temperature T1.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: July 1, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yasunori Yokoyama, Hisayuki Miki
  • Patent number: 8674398
    Abstract: There are provided a group III nitride semiconductor light emitting device which is constituted of a substrate, an intermediate layer formed thereon having a favorable level of orientation properties, and a group III nitride semiconductor formed thereon having a favorable level of crystallinity, and having excellent levels of light emitting properties and productivity; a production method thereof; and a lamp, the group III nitride semiconductor light emitting device configured so that at least an intermediate layer 12 composed of a group III nitride compound is laminated on a substrate 11, and an n-type semiconductor layer 14 having a base layer 14a, a light emitting layer 15 and a p-type semiconductor layer 16 are sequentially laminated on the intermediate layer 12, wherein when components are separated, based on a peak separation technique using an X-ray rocking curve of the intermediate layer 12, into a broad component having the full width at half maximum of 720 arcsec or more and a narrow component,
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: March 18, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hiroaki Kaji, Hisayuki Miki
  • Patent number: 8669129
    Abstract: One object of the present invention is to provide a method for producing a group III nitride semiconductor light-emitting device which has excellent productivity and produce a group III nitride semiconductor light-emitting device and a lamp, a method for producing a group III nitride semiconductor light-emitting device, in which a buffer layer (12) made of a group III nitride is laminated on a substrate (11), an n-type semiconductor layer (14) comprising a base layer (14a), a light-emitting layer (15), and a p-type semiconductor layer (16) are laminated on the buffer layer (12) in this order, comprising: a pretreatment step in which the substrate (11) is treated with plasma; a buffer layer formation step in which the buffer layer (12) having a composition represented by AlxGa1-xN (0?x<1) is formed on the pretreated substrate (11) by activating with plasma and reacting at least a metal gallium raw material and a gas containing a group V element; and a base layer formation step in which the base layer (14a)
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: March 11, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Yasunori Yokoyama, Takehiko Okabe, Kenzo Hanawa
  • Patent number: 8642992
    Abstract: A Group III nitride compound semiconductor light emitting device is provided which has: an n-type semiconductor layer (12); an active layer (13) of a multiple quantum well structure laminated on the n-type semiconductor layer (12); a first p-type semiconductor layer (14) that is a layer of a superlattice structure in which an undoped film (14a) that has a composition AlxGa1-xN (x indicating composition ratio, being within a range 0<x?0.4) and that contains no dopant, and a doped film (14b) that has a composition AlyGa1-yN (y indicating composition ratio, being within a range 0?y<0.4) and that contains a dopant, are alternately laminated a plurality of times, and a surface thereof on the active layer side (13) is constituted by the undoped film (14a); and a second p-type semiconductor layer (15) laminated on the first p-type semiconductor layer (14).
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: February 4, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Hisayuki Miki
  • Patent number: 8608980
    Abstract: A method for providing a phosphor, including a kneading step in which a raw material is kneaded to provide a raw material mixture; a sintering step in which the raw material mixture is sintered; and a heat treatment step in which the sintered raw material mixture is heat-treated, wherein the raw material includes at least one or more M-containing materials selected from MSi2, MSiN2, M2Si5N8, M3Al2N4 and MSi6N8, wherein M is one or more divalent elements selected from M(0) and M(1).
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: December 17, 2013
    Assignee: National Institute for Materials Science
    Inventors: Kousuke Shioi, Naoto Hirosaki, Hisayuki Miki
  • Patent number: 8569794
    Abstract: A Group III nitride semiconductor device of the present invention is obtained by laminating at least a buffer layer (12) made of a Group III nitride compound on a substrate (11), wherein the buffer layer (12) is made of AlN, and a lattice constant of a-axis of the buffer layer (12) is smaller than a lattice constant of a-axis of AlN in a bulk state.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: October 29, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Yasunori Yokoyama
  • Patent number: 8557092
    Abstract: A backing plate for use in a sputtering deposition apparatus being capable of stably holding Ga, and a sputtering deposition apparatus which is equipped with the backing plate are provided. Such a backing plate for use in a sputtering deposition apparatus is a backing plate for holding a target material which contains Ga, and at least a contact surface of which coming into contact with the target material is constituted from an easily wettable material having a contact angle to Ga in a liquid state of not more than 90°.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: October 15, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Kenzo Hanawa, Yasumasa Sasaki
  • Patent number: 8550645
    Abstract: An illumination device for a display device, which is formed from a substrate and a plurality of white light-emitting devices disposed on top of the substrate, and can be used as a backlight for a liquid crystal display panel, wherein the white light-emitting devices have a light source and a phosphor that is excited by the light source and emits light, and a fluorescent material with a composition represented by a general formula: M(0)aM(1)bM(2)x?(vm+n)M(3)(vm+n)?yOnNz?n is used as the phosphor.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: October 8, 2013
    Assignees: Showa Denko K.K., National Institute for Materials Science
    Inventors: Hisayuki Miki, Kousuke Shioi, Naoto Hirosaki
  • Patent number: 8445302
    Abstract: One object of the present invention is to provide a method for producing a group III nitride semiconductor light-emitting device which has excellent productivity and produce a group III nitride semiconductor light-emitting device and a lamp, a method for producing a group III nitride semiconductor light-emitting device, in which a buffer layer (12) made of a group III nitride is laminated on a substrate (11), an n-type semiconductor layer (14) comprising a base layer (14a), a light-emitting layer (15), and a p-type semiconductor layer (16) are laminated on the buffer layer (12) in this order, comprising: a pretreatment step in which the substrate (11) is treated with plasma; a buffer layer formation step in which the buffer layer (12) having a composition represented by AlxGa1-xN (0?x<1) is formed on the pretreated substrate (11) by activating with plasma and reacting at least a metal gallium raw material and a gas containing a group V element; and a base layer formation step in which the base layer (14a)
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: May 21, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Yasunori Yokoyama, Takehiko Okabe, Kenzo Hanawa
  • Patent number: 8398892
    Abstract: The invention is a phosphor which includes a phosphor material having a composition represented by a general formula: M(0)aM(1)bM(2)x?(vm+n)M(3)(vm+n)?yOnNz?n, wherein M(0) is one or more elements selected from Li, Na, Be, Mg, Ca, Sr, Ba, Sc, Y, La, Gd and Lu; M(1) is one or more activators selected from Mn, Ce, Pr, Nd, Sm, Eu, Tb, Dy, Ho, Er, Tm and Yb; M(2) is one or more elements selected from Si, Ge, Sn, Ti, Hf and Zr; M(3) is one or more elements selected from Be, B, Al, Ga, In, Tl and Zn; O is oxygen; N is nitrogen; and an atomic ratio of M(0), M(1), M(2), M(3), O and N is adjusted to satisfy the following: x, y and z satisfy 33?x?51, 8?y?12 and 36?z?56; a and b satisfy 3?a+b?7 and 0.001?b?1.2; m and n satisfy 0.8·me?m?1.2·me and 0?n?7 in which me=a+b; and v satisfies v={a·v(0)+b·v(1)}/(a+b) (wherein v(0) is a valence of M(0) ion and v(1) is a valence of M(1) ion). The invention also relates to a method for producing the phosphor and a light-emitting device using the phosphor.
    Type: Grant
    Filed: September 1, 2008
    Date of Patent: March 19, 2013
    Assignees: Showa Denko K.K., National Institute For Materials Science
    Inventors: Kousuke Shioi, Naoto Hirosaki, Hisayuki Miki
  • Patent number: 8389313
    Abstract: The present invention provides a deposition method of a multilayered structure composed of a III group nitride compound semiconductor having good crystallinity on a substrate. The multilayered structure comprises at least a buffer layer and an underlying layer from the substrate side, and the buffer layer and the underlying layer are formed by a sputtering method. A deposition temperature of the buffer layer is adjusted to a temperature lower than a deposition temperature of the underlying layer, or the thickness of the buffer layer is adjusted to 5 nm to 500 nm. Furthermore, the multilayered structure comprises at least an underlying layer and a light-emissive layer from the substrate side and the underlying layer is formed by a sputtering method, and the method comprises the step of forming the light-emissive layer by a metal-organic chemical vapor deposition (MOCVD method).
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: March 5, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Kenzo Hanawa, Yasumasa Sasaki