Patents by Inventor Hisayuki Nakagome

Hisayuki Nakagome has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11168015
    Abstract: An optical fiber includes: a core; and a cladding layer disposed on an outer circumference of the core. A Cl concentration in the cladding layer is 0.029 wt % to 0.098 wt %. In the optical fiber, ?2??1?0 dB/km is satisfied at a wavelength of 430 nm where ?1 is a value of transmission loss before exposure of the optical fiber to hydrogen and ?2 is a value of transmission loss after the exposure.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: November 9, 2021
    Assignee: Fujikura Ltd.
    Inventor: Hisayuki Nakagome
  • Patent number: 11111171
    Abstract: An optical fiber includes: a core; and a cladding layer disposed on an outer circumference of the core. A Cl concentration in the cladding layer is 0.029 wt % to 0.098 wt %. In the optical fiber, ?2??1?0 dB/km is satisfied at a wavelength of 430 nm where ?1 is a value of transmission loss before exposure of the optical fiber to hydrogen and ?2 is a value of transmission loss after the exposure.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: September 7, 2021
    Assignee: Fujikura Ltd.
    Inventor: Hisayuki Nakagome
  • Publication number: 20200048137
    Abstract: An optical fiber includes: a core; and a cladding layer disposed on an outer circumference of the core. A Cl concentration in the cladding layer is 0.029 wt % to 0.098 wt %. In the optical fiber, ?2??1?0 dB/km is satisfied at a wavelength of 430 nm where ?1 is a value of transmission loss before exposure of the optical fiber to hydrogen and ?2 is a value of transmission loss after the exposure.
    Type: Application
    Filed: April 3, 2018
    Publication date: February 13, 2020
    Applicant: Fujikura Ltd.
    Inventor: Hisayuki Nakagome
  • Patent number: 9480157
    Abstract: A wiring board includes a first interlayer insulation layer, a second interlayer insulation layer formed on the first interlayer insulation layer and having an opening portion, first conductive pads formed on the second interlayer insulation layer, a conductive plane layer formed on the first interlayer insulation layer such that the conductive plane layer is exposed by the opening portion of the second interlayer insulation layer, a wiring structure positioned directly on the conductive plane layer such that the wiring structure is accommodated in the opening portion of the second interlayer insulation layer, and second conductive pads formed on the wiring structure such that the first conductive pads and the second conductive pads are set to be positioned on a same plane.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: October 25, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Yoshinori Shizuno, Nobuya Takahashi, Hisayuki Nakagome, Asuka Ii
  • Patent number: 9307643
    Abstract: A substrate having a built-in electronic component includes an insulating substrate having an opening portion, a conductor pattern formed on the substrate, an electronic component accommodated in the opening portion of the substrate and having a terminal, an insulating layer formed on the substrate such that the insulating layer is covering the pattern and the component in the substrate, and multiple via conductors penetrating through the insulating layer and including a first via conductor reaching to the pattern on the substrate and a second via conductor reaching to the terminal of the component in the substrate. The pattern has a recessed connecting portion connected to the first via conductor, the terminal of the component has a recessed connecting portion connected to the second via conductor, and the recessed connecting portion of the pattern has depth which is greater than depth of the recessed connecting portion of the terminal.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: April 5, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Hisayuki Nakagome, Toshiki Furutani
  • Publication number: 20150216049
    Abstract: A wiring board includes a first interlayer insulation layer, a second interlayer insulation layer formed on the first interlayer insulation layer and having an opening portion, first conductive pads formed on the second interlayer insulation layer, a conductive plane layer formed on the first interlayer insulation layer such that the conductive plane layer is exposed by the opening portion of the second interlayer insulation layer, a wiring structure positioned directly on the conductive plane layer such that the wiring structure is accommodated in the opening portion of the second interlayer insulation layer, and second conductive pads formed on the wiring structure such that the first conductive pads and the second conductive pads are set to be positioned on a same plane.
    Type: Application
    Filed: April 7, 2015
    Publication date: July 30, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Yoshinori SHIZUNO, Nobuya TAKAHASHI, Hisayuki NAKAGOME, Asuka II
  • Publication number: 20150163919
    Abstract: A substrate having a built-in electronic component includes an insulating substrate having an opening portion, a conductor pattern formed on the substrate, an electronic component accommodated in the opening portion of the substrate and having a terminal, an insulating layer formed on the substrate such that the insulating layer is covering the pattern and the component in the substrate, and multiple via conductors penetrating through the insulating layer and including a first via conductor reaching to the pattern on the substrate and a second via conductor reaching to the terminal of the component in the substrate. The pattern has a recessed connecting portion connected to the first via conductor, the terminal of the component has a recessed connecting portion connected to the second via conductor, and the recessed connecting portion of the pattern has depth which is greater than depth of the recessed connecting portion of the terminal.
    Type: Application
    Filed: December 10, 2014
    Publication date: June 11, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Hisayuki NAKAGOME, Toshiki Furutani
  • Patent number: 9035463
    Abstract: A wiring board includes a first insulation layer, a first conducive layer having first conductive patterns formed on the first insulation layer, a wiring structure positioned on the first insulation layer and including a second insulation layer and a second conductive layer having second conductive patterns formed on the second insulation layer, multiple conductive patterns formed on the wiring structures such that the conductive patterns are connected to the second conductive patterns, respectively, multiple first electrodes formed on the first conductive patterns, respectively, and multiple second electrodes formed on the conductive patterns connected to the second conductive patterns of the wiring structure, respectively. The first electrodes and the second electrodes have top surfaces which form the same plane.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: May 19, 2015
    Assignee: IBIDEN CO., LTD.
    Inventors: Yoshinori Shizuno, Nobuya Takahashi, Hisayuki Nakagome, Asuka Ii
  • Publication number: 20130307162
    Abstract: A wiring board includes a first insulation layer, a first conducive layer having first conductive patterns formed on the first insulation layer, a wiring structure positioned on the first insulation layer and including a second insulation layer and a second conductive layer having second conductive patterns formed on the second insulation layer, multiple conductive patterns formed on the wiring structures such that the conductive patterns are connected to the second conductive patterns, respectively, multiple first electrodes formed on the first conductive patterns, respectively, and multiple second electrodes formed on the conductive patterns connected to the second conductive patterns of the wiring structure, respectively. The first electrodes and the second electrodes have top surfaces which form the same plane.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 21, 2013
    Applicant: IBIDEN CO., LTD.
    Inventors: Yoshinori Shizuno, Nobuya Takahashi, Hisayuki Nakagome, Asuka II