Abstract: A drain (7) includes a lightly-doped shallow impurity region (7a) aligned with a control gate (5), and a heavily-doped deep impurity region (7b) aligned with a sidewall film (8) and doped with impurities at a concentration higher than that of the lightly-doped shallow impurity region (7a). The lightly-doped shallow impurity region (7a) leads to improvement of the short-channel effect and programming efficiency. A drain contact hole forming portion (70) is provided to the heavily-doped impurity region (7b) to reduce the contact resistance at the drain (7).

Abstract: A drain (7) includes a lightly-doped shallow impurity region (7a) aligned with a control gate (5), and a heavily-doped deep impurity region (7b) aligned with a sidewall film (8) and doped with impurities at a concentration higher than that of the lightly-doped shallow impurity region (7a). The lightly-doped shallow impurity region (7a) leads to improvement of the short-channel effect and programming efficiency. A drain contact hole forming portion (70) is provided to the heavily-doped impurity region (7b) to reduce the contact resistance at the drain (7).

Abstract: A drain (7) includes a lightly-doped shallow impurity region (7a) aligned with a control gate (5), and a heavily-doped deep impurity region (7b) aligned with a sidewall film (8) and doped with impurities at a concentration higher than that of the lightly-doped shallow impurity region (7a). The lightly-doped shallow impurity region (7a) leads to improvement of the short-channel effect and programming efficiency. A drain contact hole forming portion (70) is provided to the heavily-doped impurity region (7b) to reduce the contact resistance at the drain (7).

Abstract: A drain (7) includes a lightly-doped shallow impurity region (7a) aligned with a control gate (5), and a heavily-doped deep impurity region (7b) aligned with a sidewall film (8) and doped with impurities at a concentration higher than that of the lightly-doped shallow impurity region (7a). The lightly-doped shallow impurity region (7a) leads to improvement of the short-channel effect and programming efficiency. A drain contact hole forming portion (70) is provided to the heavily-doped impurity region (7b) to reduce the contact resistance at the drain (7).

Abstract: A drain (7) includes a lightly-doped shallow impurity region (7a) aligned with a control gate (5), and a heavily-doped deep impurity region (7b) aligned with a sidewall film (8) and doped with impurities at a concentration higher than that of the lightly-doped shallow impurity region (7a). The lightly-doped shallow impurity region (7a) leads to improvement of the short-channel effect and programming efficiency. A drain contact hole forming portion (70) is provided to the heavily-doped impurity region (7b) to reduce the contact resistance at the drain (7).

Abstract: A drain (7) includes a lightly-doped shallow impurity region (7a) aligned with a control gate (5), and a heavily-doped deep impurity region (7b) aligned with a sidewall film (8) and doped with impurities at a concentration higher than that of the lightly-doped shallow impurity region (7a). The lightly-doped shallow impurity region (7a) leads to improvement of the short-channel effect and programming efficiency. A drain contact hole forming portion (70) is provided to the heavily-doped impurity region (7b) to reduce the contact resistance at the drain (7).

Abstract: A drain (7) comprises a lightly-doped shallow impurity region (7a) aligned with a control gate (5), and a heavily-doped deep impurity region (7b) aligned with a sidewall film (8) and doped with impurities at a concentration higher than that of the lightly-doped shallow impurity region (7a). The lightly-doped shallow impurity region (7a) leads to improvement of the short-channel effect and programming efficiency. A drain contact hole forming portion (70) is provided to the heavily-doped impurity region (7b) to reduce the contact resistance at the drain (7).

Abstract: A method of forming an oxide film having high insularity capability is performed within an ultra clean environment, using charged particles.

Abstract: Vacuum processing equipment capable of preventing particles from sticking to objects to be processed in vacuum vessels. The vacuum equipment comprises a series of vacuum vessels separated by doors, and the pressure in the vessels are reducible respectively. The vessels are so configured that objects to be processed are moveable among them and there is provided light projection means for projecting ultra rays on gases introduced to at least of the vessels.

Abstract: Vacuum processing equipment capable of preventing particles from sticking to objects to be processed in vacuum vessels. The vacuum equipment comprises a series of vacuum vessels separated by doors, and the pressure in the vessels are reducible respectively. The vessels are so configured that objects to be processed are movable among them, and there is provided light projection means for projecting ultra rays on gases introduced to at least of the vessels.

Abstract: A flash memory device and a method to erase the flash memory device having a plurality of memory cells each having a source, a drain, a control gate, wherein the memory cells are organized in rows and columns with a wordline attached to the control gates of the memory cells in a row, with a bitline attached to the drains of cells in a column and a sourceline attached to the sources of cells in a row, and a switch connected between each sourceline and VS is controlled by sourceline decode circuit that opens a sourceline switch after the cells on the associated wordline verify as erased.

Abstract: A flash memory device and a method to read the flash memory device to decrease leakage current during read. The flash memory device has a source line control circuit connected to the sources of memory cells in a row and during read the source line control circuit connects the sources of the memory cells in a row to ground.

Abstract: Vacuum processing equipment capable of preventing particles from sticking to objects to be processed in vacuum vessels. The vacuum equipment comprises a series of vacuum vessels separated by doors, and the pressure in the vessels are reducible respectively. The vessels are so configured that objects to be processed are movable among them, and there is provided light projection means for projecting ultra rays on gases introduced to at least of the vessels.

Abstract: A lithography process for forming a pattern having different sizes or different shapes of pattern components, comprises steps of exposing a resist to a predetermined light pattern by modified illumination, and removing, at least one step of forming the resist pattern, a region of the resist by employing a lithography-developing solution containing a surfactant, the surfactant being capable of promoting dissolution of a smaller pattern component to be removed of the resist.The surfactant is represented by the general formula below:HO(CH.sub.2 CH.sub.2 O).sub.a (CH(CH.sub.3)CH.sub.2 O).sub.b (CH.sub.2 CH.sub.2 O).sub.c Hwhere a, b, and c are respectively an integer.The surfactant satisfies the relation:(A+C)/(A+B+C).ltoreq.0.3where A represents the molecular weight of HO(CH.sub.2 CH.sub.2 O).sub.a, B represents the molecular weight of (CH(CH.sub.3)CH.sub.2 O).sub.b, and C represents the molecular weight of (CH.sub.2 CH.sub.2 O).sub.c H.

Abstract: Provided is a lithographic developer used to develop a resist pattern having regions with different sizes and shapes, by dissolving and removing a resist region of a resist layer formed in the resist pattern, wherein the developer comprises a surfactant capable of increasing the dissolution of a resist in the resist region to be dissolved and removed, having a smaller dissolving-and-removing area on the surface of the resist layer.

Abstract: The semiconductor device has a large capacity of power driving, and can operate at a high speed. A first semiconductor region of a first conductivity type is formed on a metal substrate through a first insulating film. In the first semiconductor region, first source and drain regions of a second conductivity type are formed. Further, on the region which isolates the first source and drain regions, a first metallic gate electrode is formed through a second insulating film.