Abstract: A pacing monitoring system is described for incorporation in an implantable pacemaker that monitors the pacing rate and/or cumulative pace count in order to protect a patient from excessive pacing. The system includes monitoring circuitry that is configured to operate in multiple monitoring zones, where each zone is adapted to prevent excessively high-rate pacing during a particular mode of device operation.

Abstract: A system and method is disclosed by which an implantable cardiac device may deliver bradycardia therapy in the event of a system fault. A hardware-based safety core provides the logic circuitry for delivering bradycardia therapy in the form of synchronous pacing in the event of a fault which disables operation of the device's primary control circuitry. The safety core pacemaker eliminates common mode failure of the primary control circuits used in the primary pacing system. Failures in the primary controller memory or execution will activate the safety core pacemaker.

Abstract: A system and method is disclosed for system fault recovery by an implantable medical device which employs a global fault response. The system enables the device to consistently recover from transient faults while maintaining a history of the reason for the device fault. Upon detection of a fault, the primary controller of the device signals a reset controller which then issues a reset command. All sub-systems of the primary device controller are then reset together rather than resetting individual sub-systems independently to ensure deterministic behavior.

Abstract: A system and method is disclosed by which an implantable cardiac device may deliver tachyarrhythmia therapy in the event of a system fault. A hardware-based safety core provides the logic circuitry for detecting tachyarrhythmias and delivering shock therapy in the event of a fault which disables operation of the device's primary control circuitry. The safety core defibrillator eliminates common mode failure of the primary control circuits used in the primary defibrillator system. Failures in the primary controller memory or execution will activate the safety core defibrillator.

Abstract: A system comprises an implantable medical device (IMD). The IMD includes at least one electrical input to receive sensed electrical activity of a heart and a sampler circuit coupled to the at least one electrical input. The sampler circuit generates sampled values of the sensed electrical activity. The IMD includes a clock circuit that generates readable values representative of absolute time. The IMD also includes a controller circuit coupled to the sampler circuit and the clock circuit. The controller circuit processes the sampled values and generate at least one marker to indicate a detected event related to the electrical activity. The controller circuit also stores a timestamp of absolute time of the detected event with the at least one marker in memory.