Patents by Inventor Hitesh Rastogi
Hitesh Rastogi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240094960Abstract: A computer-implemented method is disclosed. The method includes: receiving an initiation request for a data transfer associated with a terminal; determining that a resource external to the first logical storage area should be accessed to complete the data transfer; in response to determining that the resource external to the first logical storage area should be accessed to complete the data transfer, triggering a query message to an electronic device accessible to an entity associated with the first logical storage area, the query message prompting for an instruction to access the resource external to the first logical storage area to complete the transfer; receiving, from the electronic device, an instruction to access the resource external to the first logical storage area to complete the transfer; and in response to receiving the instruction, effecting the transfer using the resource external to the first logical storage area.Type: ApplicationFiled: September 19, 2022Publication date: March 21, 2024Applicant: The Toronto-Dominion BankInventors: Milos DUNJIC, David Samuel TAX, Kushank RASTOGI, Thomas Osman KELLY, Pranay Chander GUPTA, Hitesh BAJAJ, Asad JOHEB
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Publication number: 20240089136Abstract: Methods, computer systems, and computer-storage media, and graphical user interfaces are provided for facilitating efficient meeting management, according to embodiments of the present technology. In one embodiment, engagement data associated with an attendee of an online meeting is obtained. Thereafter, an engagement metric is generated using the engagement data, the engagement metric indicating an extent of engagement of the attendee to the online meeting. Based on the engagement metric indicating that the extent of engagement of the attendee to the online meeting falls below an engagement threshold, a request is provided to disconnect or throttle an audio and/or video stream of the online meeting to and/or from an attendee device associated with the attendee of the online meeting. Efficient meeting management may also be performed by clustering related messages.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Inventors: Pranavasthitha TANDRA, Hitesh Kumar JHAMB, Vikram GUPTA, Arvind Kumar SINGH, Anubhuti ARUN, Ashutosh TRIPATHI, Kausik GHATAK, Aman RASTOGI
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Patent number: 8761169Abstract: A method includes inserting a vector in a packet that identifies a first device in a stack of packet forwarding devices to receive the packet.Type: GrantFiled: December 6, 2011Date of Patent: June 24, 2014Assignee: Intel CorporationInventors: Muraleedhara Herur Navada, Hitesh Rastogi
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Publication number: 20120201242Abstract: A method includes inserting a vector in a packet that identifies a first device in a stack of packet forwarding devices to receive the packet.Type: ApplicationFiled: December 6, 2011Publication date: August 9, 2012Applicant: Intel CorporationInventors: Muraleedhara Herur Navada, Hitesh Rastogi
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Patent number: 8238239Abstract: Packet flow control techniques are disclosed. In one example case, a flow control method is provided that includes transmitting a plurality of packets with an inter-packet gap disposed between neighboring packets, and increasing the length of the inter-packet gap to decrease packet rate, wherein the increased length is selected based on severity of a congestion condition. In another example case, a flow control system is provided that includes circuitry for transmitting and/or receiving a plurality of packets with an inter-packet gap disposed between neighboring packets, and circuitry for increasing the length of the inter-packet gap to decrease packet rate, wherein the increased length is selected based on severity of a congestion condition. The techniques can be carried out at one node of a communication system (such as in a backplane switch) or multiple nodes (such as between a backplane switch and a circuit board operatively coupled to the backplane).Type: GrantFiled: December 30, 2008Date of Patent: August 7, 2012Assignee: Intel CorporationInventors: Manoj Wadekar, Hitesh Rastogi
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Patent number: 8085772Abstract: A method includes inserting a vector in a packet that identifies a first device in a stack of packet forwarding devices to receive the packet.Type: GrantFiled: December 31, 2003Date of Patent: December 27, 2011Assignee: Intel CorporationInventors: Muraleedhara Herur Navada, Hitesh Rastogi
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Patent number: 7684390Abstract: A method according to one embodiment may include communicating with at least one external device using at least one port, said at least one external device comprises at least one probe port. The method of this embodiment may also include receiving at least one data packet and generating at least one probe packet. The method of this embodiment may further include generating at least one probe packet device vector and transmitting the probe packet and the probe packet device vector to at least one probe port of at least one external device via at least one port. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.Type: GrantFiled: December 30, 2004Date of Patent: March 23, 2010Assignee: Intel CorporationInventors: Muraleedhara Herur Navada, Hitesh Rastogi
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Publication number: 20090175168Abstract: Packet flow control techniques are disclosed. In one example case, a flow control method is provided that includes transmitting a plurality of packets with an inter-packet gap disposed between neighboring packets, and increasing the length of the inter-packet gap to decrease packet rate, wherein the increased length is selected based on severity of a congestion condition. In another example case, a flow control system is provided that includes circuitry for transmitting and/or receiving a plurality of packets with an inter-packet gap disposed between neighboring packets, and circuitry for increasing the length of the inter-packet gap to decrease packet rate, wherein the increased length is selected based on severity of a congestion condition. The techniques can be carried out at one node of a communication system (such as in a backplane switch) or multiple nodes (such as between a backplane switch and a circuit board operatively coupled to the backplane).Type: ApplicationFiled: December 30, 2008Publication date: July 9, 2009Applicant: INTEL CORPORATIONInventors: Manoj K. Wadekar, Hitesh Rastogi
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Patent number: 7492710Abstract: A flow control method according to one embodiment may include transmitting a first plurality of packets from a transmitting node to a receiving node at an initial packet rate, and transmitting a second plurality packets from the transmitting node to the receiving node at a congested packet rate less than the initial packet rate in response to a signal from the receiving node representative of a congestion condition at the receiving node. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.Type: GrantFiled: March 31, 2005Date of Patent: February 17, 2009Assignee: Intel CorporationInventors: Manoj K Wadekar, Hitesh Rastogi
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Patent number: 7489683Abstract: The present disclosure relates generally to an integrated circuit configured to route multicast data packets using device vectors. A method according to one embodiment may include communicating with an external device using port. The method may also include storing a multicast data packet and a master device vector in memory. The method may also include de-queueing the master device vector from memory, generating an additional device vector based on the master device vector, and transmitting the multicast data packet and an additional device vector to an external device via a port. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.Type: GrantFiled: September 29, 2004Date of Patent: February 10, 2009Assignee: Intel CorporationInventors: Muraleedhara Herur Navada, Hitesh Rastogi
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Patent number: 7293130Abstract: A method and system is provided for a multi-level memory. The system includes an internal memory and an external memory. Data packets are received through one or more input ports and initially stored in the internal memory. A control unit determines whether there is congestion of resources within the system and transfers data packets to external memory to ease the congestion. Data packets are eventually transferred from the internal or external memory to one or more output ports.Type: GrantFiled: May 29, 2002Date of Patent: November 6, 2007Assignee: Intel CorporationInventors: Rahul Saxena, Hitesh Rastogi, Ashwani Oberai
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Publication number: 20060221831Abstract: A flow control method according to one embodiment may include transmitting a first plurality of packets from a transmitting node to a receiving node at an initial packet rate, and transmitting a second plurality packets from the transmitting node to the receiving node at a congested packet rate less than the initial packet rate in response to a signal from the receiving node representative of a congestion condition at the receiving node. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.Type: ApplicationFiled: March 31, 2005Publication date: October 5, 2006Inventors: Manoj Wadekar, Hitesh Rastogi
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Publication number: 20060146723Abstract: A method according to one embodiment may include communicating with at least one external device using at least one port, said at least one external device comprises at least one probe port. The method of this embodiment may also include receiving at least one data packet and generating at least one probe packet. The method of this embodiment may further include generating at least one probe packet device vector and transmitting the probe packet and the probe packet device vector to at least one probe port of at least one external device via at least one port. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.Type: ApplicationFiled: December 30, 2004Publication date: July 6, 2006Inventors: Muraleedhara Navada, Hitesh Rastogi
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Publication number: 20060072571Abstract: A method according to one embodiment may include communicating with at least one external device using at least one port. The method may also include storing a multicast data packet and a master device vector in memory. The method may also include de-queueing the master device vector from memory, generating at least one additional device vector based at least in part on the master device vector, and transmitting the multicast data packet and at least one additional device vector to at least one external device via at least one port. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.Type: ApplicationFiled: September 29, 2004Publication date: April 6, 2006Inventors: Muraleedhara Navada, Hitesh Rastogi
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Publication number: 20050198362Abstract: A method includes inserting a vector in a packet that identifies a first device in a stack of packet forwarding devices that delivers the packet to an exception processor being shared by the packet forwarding devices in the stack.Type: ApplicationFiled: December 31, 2003Publication date: September 8, 2005Inventors: Muraleedhara Navada, Hitesh Rastogi
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Publication number: 20050141496Abstract: A method includes inserting a vector in a packet that identifies a first device in a stack of packet forwarding devices to receive the packet.Type: ApplicationFiled: December 31, 2003Publication date: June 30, 2005Inventors: Muraleedhara Navada, Hitesh Rastogi
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Publication number: 20030223447Abstract: A method and system is provided for synchronizing multi-level memory. The system has an internal memory and an external memory. Data packets are initially stored in the internal memory. A determination is made as to whether to transfer the data packet to the external memory based on congestion of system resources. When it is time to transfer a data packet that should be stored in external memory to an output port, a determination is made as to whether the data packet has actually been transferred to the external memory. If the data packet has been transferred to the external memory, the data packet is retrieved from the external memory and transferred to the output port. Otherwise, no attempt is made to transfer the data packet from external memory to the output port until the data packet has been transferred to the external memory. This ensures that no attempt is made to retrieve the data packet from the external memory when the data packet is still being stored in the internal memory.Type: ApplicationFiled: May 29, 2002Publication date: December 4, 2003Inventors: Rahul Saxena, Hitesh Rastogi
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Publication number: 20030223415Abstract: A method and system is provided for a multi-level memory. The system includes an internal memory and an external memory. Data packets are received through one or more input ports and initially stored in the internal memory. A control unit determines whether there is congestion of resources within the system and transfers data packets to external memory to ease the congestion. Data packets are eventually transferred from the internal or external memory to one or more output ports.Type: ApplicationFiled: May 29, 2002Publication date: December 4, 2003Inventors: Rahul Saxena, Hitesh Rastogi, Ashwani Oberai