Patents by Inventor Hitomi Aizawa

Hitomi Aizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190185657
    Abstract: Provided are a sealant that is affixed to an electronic device provided on an electronic substrate or the like or to an exposed metal portion to protect the electronic device or other adherend from moisture and the like and a sealant composition before being cured to become the sealant. The sealant and the sealant composition have form stability, flexibility, and adhesiveness. The sealant composition contains, as essential components, a cured epoxy resin having a flexible backbone, a monofunctional (meth)acrylic ester monomer, a photo-radical polymerization initiator, and a styrene-based elastomer. The monofunctional (meth)acrylic ester monomer is curable by irradiation with light. The sealant composition has form stability and also has a flexibility such that a load measured when the sealant composition having a thickness of 1 mm is compressed by 25% with a cylindrical probe having a bottom end with a diameter of 10 mm is 0.19 to 3.2 N. The sealant is obtained by photocuring the sealant composition.
    Type: Application
    Filed: May 12, 2017
    Publication date: June 20, 2019
    Applicant: SEKISUI POLYMATECH CO., LTD.
    Inventor: Hitomi AIZAWA
  • Patent number: 6519548
    Abstract: Provided is a diver's information processing device for notifying a diver of a change in a pressure decrease ratio, at which pressure decreases during surfacing, for the purpose of minimizing the risk of a diver's decompression sickness and excess pulmonary expansion. In particular, when diving is performed at a high altitude, notification is made so that a pressure decrease ratio will be held lower than a pressure decrease ratio permitted at a low altitude. A diver's information processing device 1 includes means that uses a pressure meter 61 and a timer 68 to calculate a pressure decrease ratio. Moreover, the diver's information processing device 1 includes means that uses an acoustic notifier 37, a vibration generator 38, and a display panel 11 to continuously notify a pressure decrease ratio, at which pressure applied to a diver decreases during surfacing, for the purpose of minimizing the dangers of diver's surfacing.
    Type: Grant
    Filed: May 3, 2001
    Date of Patent: February 11, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Masao Kuroda, Hitomi Aizawa
  • Patent number: 5548765
    Abstract: A computer system, according to an embodiment of the present invention comprises a host CPU, an image rendering device, a CRT image memory, a video subsystem, an alternative display converter, an alternative display memory, an LCD controller, a change-of-status (COS) detector, a power up/down controller, and a computer display screen. The COS detector monitors the host CPU, image rendering device, CRT image memory, looking for updates that would require a change in the image displayed on the computer display screen. The COS detector signals the power up/down controller to power-off and/or slow system clocks to the CRT image memory, the video subsystem, the alternative display converter, the alternative display memory, and the LCD controller when there is no change to be made in the image on the computer display screen.
    Type: Grant
    Filed: March 2, 1994
    Date of Patent: August 20, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Takeo Tsunoda, Hitomi Aizawa, Yuji Hama
  • Patent number: 5036276
    Abstract: A magnetic encoder comprises a sensor having a plurality of magnetoresistive (MR) elements placed in juxtaposed position relative to a magnetic recording medium upon which data signals are recorded employing a recording pitch, A. Output signals produced by the MR elements connected in a plurality of bridge circuits are formed by relative movement between the MR elements and the magnetic recording medium. The MR elements are positioned at A/n intervals, wherein n is an integer and n.gtoreq.8. A multiplier circuit is connected to receive the output signals from the MR element bridge circuits and provide a plurality of phase shifted output signals corresponding to a A/N pitch interval of recording pitch, A, wherein N is an integer and N.gtoreq.2.
    Type: Grant
    Filed: April 4, 1990
    Date of Patent: July 30, 1991
    Assignee: Seiko Epson Corporation
    Inventor: Hitomi Aizawa
  • Patent number: 4761771
    Abstract: An electronic timekeeping apparatus includes a temperature value generating circuit for generating a temperature value, a temperature value converting circuit including a slope adjusting circuit which provides a slope corrected output in accordance with a frequency versus temperature characteristic of the apparatus in response to the temperature value, a pace compensation data circuit for producing pace compensation data corresponding to the slope corrected output, and a pace compensating circuit for compensating pace of the apparatus in accordance with the pace compensation data. An offset adjustment circuit may operate on said temperature value or said slope corrected output.
    Type: Grant
    Filed: May 4, 1987
    Date of Patent: August 2, 1988
    Assignee: Seiko Epson Corporation
    Inventors: Tatsuo Moriya, Hitomi Aizawa, Kuniharu Natori, Kazumi Kamoi, Hiroshi Yabe
  • Patent number: 4730286
    Abstract: Rate change in a quartz crystal timepiece due, for example, to aging of a capacitance used for correcting the frequency-temperature characteristic of the crystal oscillator of the timepiece, is corrected by dividing the oscillator output signal to provide a minimum rate adjustment unit signal and a rate adjustment timing signal. A rate adjustment step width signal consisting of a number of minumum rate adjustment unit signals is predetermined for all of the timepieces in a production run. The number controls the repeated counting of unit signals to produce a series of step width signals. The rate adjustment required for correct timekeeping is determined as an integral number of step width signals. The latter number is set into a second counter in the timepiece to generate a rate adjustment signal. The rate adjustment signal controls the duty cycle of a switch which adds reactance to the crystal oscillator circuit to effect the rate change.
    Type: Grant
    Filed: July 1, 1985
    Date of Patent: March 8, 1988
    Assignee: Seiko Epson Corporation
    Inventors: Hitomi Aizawa, Hiroshi Yabe
  • Patent number: 4551029
    Abstract: A sound generator including a note generating circuit for outputting a sequence of note signals corresponding to audible notes, an acoustic transducer receiving said note signals and outputting audible notes, memory means for storing data characterizing a note signal and including an inhibit signal, inhibit means, and means responsive to the inhibit signal from the memory means for transmitting said inhibit signal to said inhibit means to block passage of the terminal portion of the note signal to the transducer means.
    Type: Grant
    Filed: September 7, 1984
    Date of Patent: November 5, 1985
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Hitomi Aizawa
  • Patent number: 4508457
    Abstract: The electronic timepiece includes coding means to code voice signals inputted from an outside source, a semi-conductor memory circuit in which the coded signal is written and stored, a voice synthesizing circuit which reads the coded signals from the memory circuit and converts the coded signals into an analog voice signal, generating means to generate voice using the analog output of the voice synthesizing circuit, and a controller which controls reading and writing of coded signals out of and into the memory circuit. The control signals provided by the controller are of variable period in response to operation of an external member such that data is written into and read out of the memory circuit at selected bit rates.
    Type: Grant
    Filed: November 24, 1982
    Date of Patent: April 2, 1985
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Hitomi Aizawa
  • Patent number: 4479065
    Abstract: A chattering preventive circuit for preventing chattering in a switch having a mechanical contact. The circuit includes a switch element for producing an input signal representative of the open and closed states of the switch and also includes a periodic pulse signal. A first memory circuit receives the input signal and the periodic pulse signal and produces a write-in signal representative of the coincidence of the input signal and the periodic pulse signal. A second memory circuit receives the write-in signal and the periodic pulse signal and produces an output signal representative of the closed state of the switch element only when the switch element is kept closed for at least a predetermined time period. The second memory circuit will not produce the next output signal representative of another closing of the switch element unless the switch element first remains open for at least a predetermined time prior to reclosing.
    Type: Grant
    Filed: May 26, 1982
    Date of Patent: October 23, 1984
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Hitomi Aizawa
  • Patent number: 4417155
    Abstract: A signal produced by connecting the electrical contacts of a mechanical switch is read into a circuit without chatter only when the switch is closed longer than a selected time period. A first memory stores and outputs a switch actuation signal on the occurrence of a read signal, and erases the stored signal when the switch actuation signal is removed. A second memory outputs a square wave pulse on the coincidence of a later read signal and the first memory output. Electrical noise lasting less than the selected time period does not produce an output. The selected time period can be varied by using independent, phase-shifted read signals for each memory.
    Type: Grant
    Filed: June 25, 1981
    Date of Patent: November 22, 1983
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Hitomi Aizawa
  • Patent number: 4378167
    Abstract: A time correction circuit for an electronic timepiece comprising an oscillator circuit inputting a high frequency standard signal to a divider network, the divider network dividing down the standard signal in a plurality of stages. Correction data is periodically applied to a plurality of divider stages to advance or retard the timing rate when a selected stage achieves a preferred logic state. Occurrence of a logic state in a subsequent divider stage enables the circuits for the next periodic application of the correcting data. Coarse and fine adjustments can be made.
    Type: Grant
    Filed: March 28, 1980
    Date of Patent: March 29, 1983
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Hitomi Aizawa
  • Patent number: 4376992
    Abstract: An electronic wristwatch without mechanically driven hands has an electromagnetic output which is sensed for measuring the timing rate. A modulated signal applied to the coil of an alarm sounding device produces the electromagnetic field for sensing. The display is fully illuminated while timing in order to eliminate stray electric fields.
    Type: Grant
    Filed: February 27, 1980
    Date of Patent: March 15, 1983
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Hitomi Aizawa
  • Patent number: 4349900
    Abstract: An electronic timepiece including an external member which by linear and rotating motion actuates three switch functions, comprises circuits to correct for inadvertent improper sequencing in actuation of the external member. A counter-timer discriminates between inadvertent actuations occurring at abnormally short time intervals and normal actuations at longer intervals, and in cooperation with memory circuits, restores conditions which have been inadvertently altered.
    Type: Grant
    Filed: February 26, 1980
    Date of Patent: September 14, 1982
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Hitomi Aizawa
  • Patent number: 4303995
    Abstract: An electronic wristwatch having a calendar display arrangement that is capable of memorizing and displaying date information is provided. Specifically, a digital display that is capable of displaying calendar information is coupled to a calendar display memory that is capable of selectively storing a plurality of predetermined dates therein. Operative means are coupled to the memory and the calendar display for effecting a display of the plurality of dates stored in the memory by the calendar display.
    Type: Grant
    Filed: December 29, 1978
    Date of Patent: December 1, 1981
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Hitomi Aizawa
  • Patent number: 4094136
    Abstract: An inspection circuit for facilitating the inspection of the components of an electronic timepiece at the time that same is manufactured is provided. The inspection circuit is provided in an electronic timepiece having oscillator circuitry for producing high frequency time standard signals and divider circuitry for dividing down the high frequency time standard signal and producing a lower frequency time standard signal. The electronic timepiece further includes timekeeping counter circuitry for producing timekeeping signals and a digital display for displaying time in response to the timekeeping signals being applied thereto. The inspection circuit of the instant invention is particularly characterized by an auto-clear circuit coupled to the timekeeping counter and divider circuitry for detecting a power-on condition and in response thereto, applying a reset signal to the divider and timekeeping counter circuitry to thereby reset the counts thereof.
    Type: Grant
    Filed: December 22, 1976
    Date of Patent: June 13, 1978
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Hitomi Aizawa