Patents by Inventor Hitomi Yasutake

Hitomi Yasutake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7170137
    Abstract: A semiconductor device includes a semiconductor substrate having a first conductivity type. A pair of source/drain areas having a second conductivity type is formed on a surface of the semiconductor substrate. A gate insulating film is provided on a channel area between the source/drain areas. A gate electrode having the first conductivity type is provided on the gate insulating film. The gate electrode has a first portion located above a channel area and second portions located above the source/drain area. The concentration of majority carriers in the second portion is lower than that in the first portion.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: January 30, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hitomi Yasutake, Hideaki Aochi
  • Patent number: 7145197
    Abstract: A semiconductor device includes a semiconductor substrate, a trench formed in the semiconductor substrate, an island-like element region formed in the semiconductor substrate, having an upper surface, first to third side surfaces, an upper portion, a middle portion and a lower portion, a gate insulating film formed on the first to third side surfaces in the upper portion of the element region, a gate electrode having first and second bottom surfaces, a first diffusion layer formed along the upper surface of the element region, a second diffusion layer formed along the first side surface in the middle portion of the element region, a channel region having first to third regions formed along the first to third side surfaces in the upper portion of the element region, a capacitor formed in the trench, and a bit line electrically connected to the first diffusion layer.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: December 5, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaru Kidoh, Hideaki Aochi, Ryota Katsumata, Masaru Kito, Hitomi Yasutake
  • Publication number: 20060189070
    Abstract: A semiconductor device includes a semiconductor substrate, a trench formed in the semiconductor substrate, an island-like element region formed in the semiconductor substrate, having an upper surface, first to third side surfaces, an upper portion, a middle portion and a lower portion, a gate insulating film formed on the first to third side surfaces in the upper portion of the element region, a gate electrode having first and second bottom surfaces, a first diffusion layer formed along the upper surface of the element region, a second diffusion layer formed along the first side surface in the middle portion of the element region, a channel region having first to third regions formed along the first to third side surfaces in the upper portion of the element region, a capacitor formed in the trench, and a bit line electrically connected to the first diffusion layer.
    Type: Application
    Filed: April 29, 2005
    Publication date: August 24, 2006
    Inventors: Masaru Kidoh, Hideaki Aochi, Ryota Katsumata, Masaru Kito, Hitomi Yasutake
  • Publication number: 20050280062
    Abstract: A semiconductor device includes a semiconductor substrate having a first conductivity type. A pair of source/drain areas having a second conductivity type is formed on a surface of the semiconductor substrate. A gate insulating film is provided on a channel area between the source/drain areas. A gate electrode having the first conductivity type is provided on the gate insulating film. The gate electrode has a first portion located above a channel area and second portions located above the source/drain area. The concentration of majority carriers in the second portion is lower than that in the first portion.
    Type: Application
    Filed: November 16, 2004
    Publication date: December 22, 2005
    Inventors: Hitomi Yasutake, Hideaki Aochi