Patents by Inventor Hitoshi Chida

Hitoshi Chida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7975253
    Abstract: An object is to simplify a power supply noise analysis model of a circuit board. CAD data of the circuit board is obtained from a CAD apparatus, and overlapping power supply islands among power supply islands existing in different layers of the circuit board are extracted as a power supply pair. Nodes are arranged in the extracted power supply pair, and the nodes of the power supply pair are projected on the power supply islands to which the power supply pair belongs. A mesh region which encloses each node is determined for each power supply island, and impedance (L, R, C) between nodes is calculated. Then, a power supply noise analysis model is created based on the impedance between nodes in each layer, and a capacitance between layers.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: July 5, 2011
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Iwakura, Shogo Fujimori, Tendou Hirai, Hitoshi Chida, Kazuyoshi Kanei, Koutarou Nimura
  • Publication number: 20080163138
    Abstract: An object is to simplify a power supply noise analysis model of a circuit board. CAD data of the circuit board is obtained from a CAD apparatus, and overlapping power supply islands among power supply islands existing in different layers of the circuit board are extracted as a power supply pair. Nodes are arranged in the extracted power supply pair, and the nodes of the power supply pair are projected on the power supply islands to which the power supply pair belongs. A mesh region which encloses each node is determined for each power supply island, and impedance (L, R, C) between nodes is calculated. Then, a power supply noise analysis model is created based on the impedance between nodes in each layer, and a capacitance between layers.
    Type: Application
    Filed: September 28, 2007
    Publication date: July 3, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki Iwakura, Shogo Fujimori, Tendou Hirai, Hitoshi Chida, Kazuyoshi Kanei, Koutarou Nimura
  • Publication number: 20040225487
    Abstract: A power supply noise analysis model generator models power supply layers in circuit boards, and includes: a CAD data obtaining section that obtains CAD data; a CAD data conversion section that converts CAD data into data suitable for noise analysis; a power supply pair extraction section that extracts a power supply pair; a mesh division section that divides a power supply pair region into meshes; a ripple processing section that arranges ripples as wave fronts of electromagnetic waves radiated into the power supply pair region from elements thereon; a node layout section that positions plural nodes on the power supply pair region; a node region determination section that determines node regions; an LRC determination section that determines L, R and C connecting the nodes; a power supply layer model generation section that generates a power supply layer model; and a power supply noise analysis model generation section that generates a power supply noise analysis model.
    Type: Application
    Filed: February 26, 2004
    Publication date: November 11, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki Iwakura, Toshiaki Sato, Kazuyoshi Kanei, Hitoshi Chida, Kotaro Nimura
  • Patent number: 6108714
    Abstract: The present invention relates to an application program grouping method which specifies a group in a multi-window system, where the group is a combination of application programs which carry out a process by linking with each other, and the multi-window system is capable of simultaneously executing in parallel a plurality of application programs respectively having one or a plurality of conversational or interactive windows that are displayed on a display. The application program grouping method includes the steps of (a) specifying at least two application programs which are to belong to one group, and (b) carrying out a grouping process which automatically generates one group made up of the specified application programs.
    Type: Grant
    Filed: April 11, 1996
    Date of Patent: August 22, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshitomo Kumagai, Hitoshi Chida