Abstract: A nametag transmitter is a nametag transmitter that is to be attached to smartwear including an electrode for detecting biological information, the nametag transmitter including: a reception unit for receiving the biological information from the electrode; a wireless communication unit for transmitting the biological information to a data collection apparatus; a display unit for displaying identification information for specifying a user of the smartwear; and a connection portion to be attached to the smartwear. The nametag transmitter is attached to the smartwear in a state in which pairing between the wireless communication unit and the data collection apparatus has been carried out.

Abstract: A ferroelectric random access memory includes a memory cell matrix constituted by a plurality of 1T1C type memory cells. Each of the plurality of memory cells is connected to a j bit line and one pair of k word lines and k plate lines. A plate line drive circuit selectively applies one of a first potential and a second potential having a higher potential level than the first potential to one plate line of the k plate lines. An equalizing circuit performs an equalizing process in which the first potential is applied to each of the j bit lines. The plate line drive circuit applies a third potential having a potential level between the first and second potentials to the one plate line, before starting the equalizing process by the equalizing circuit.

Abstract: In a solid-state imaging device, a light-shielding film 10a is formed of at least one of a high melting point metal film or a high melting point metal compound film. The surface of the light-shielding film 10a is constituted by an amorphous silicon film 13. Instead of the amorphous silicon film 13, the surface of the light-shielding film may be covered with any one of a high melting point metal film containing silicon, a high melting point metal silicide film and an oxide film. Thus, the adherence between the light-shielding film 10a and the resist can be increased and the resist can be prevented from being peeled from the light-shielding film, and thus a solid-state imaging device with a high yield even with small pixels and a method for producing the same can be provided.

Abstract: In a solid-state imaging device, a light-shielding film 10a is formed of at least one of a high melting point metal film or a high melting point metal compound film. The surface of the light-shielding film 10a is constituted by an amorphous silicon film 13. Instead of the amorphous silicon film 13, the surface of the light-shielding film may be covered with any one of a high melting point metal film containing silicon, a high melting point metal silicide film and an oxide film. Thus, the adherence between the light-shielding film 10a and the resist can be increased and the resist can be prevented from being peeled from the light-shielding film, and thus a solid-state imaging device with a high yield even with small pixels and a method for producing the same can be provided.

Abstract: On a light shielding film 7, an anti-oxidation layer 9 covering at least the light shielding film 7 is formed. The anti-oxidation layer 9 is formed under a condition which does not oxidize a surface of the light shielding film 7. The anti-oxidation layer 9 is formed of a high melting point metal compound film having a light shielding property or an insulating film having a light transmissive property. Thus, the scattering ratio of the incident light at the surface of the light shielding film 7 can be uniform among all the pixels, and as a result, a solid state imaging device having suppressed sensitivity non-uniformity can be realized. Since the surface of the light shielding film 7 is not oxidized, the thickness of the light shielding film 7 can be reduced. Thus, the present invention can comply with the demand for size reduction of the pixels.

Abstract: A semiconductor memory device has an information storing circuit such as a fuse box as well as a memory cell array with redundant memory cells that can be used to replace defective memory cells. Address information indicating which memory cells have been replaced is stored in the information storing circuit, which also stores information identifying the semiconductor memory device. In one testing mode, the identifying information is output in response to input to a series of address signals that would normally select memory cells in the memory cell array. In another testing mode, roll call results are output indicating whether each input address matches an address stored in the information storing circuit. Use of address signals to elicit output of both identifying and roll call information saves space in the memory device.

Abstract: On a light shielding film 7, an anti-oxidation layer 9 covering at least the light shielding film 7 is formed. The anti-oxidation layer 9 is formed under a condition which does not oxidize a surface of the light shielding film 7. The anti-oxidation layer 9 is formed of a high melting point metal compound film having a light shielding property or an insulating film having a light transmissive property. Thus, the scattering ratio of the incident light at the surface of the light shielding film 7 can be uniform among all the pixels, and as a result, a solid state imaging device having suppressed sensitivity non-uniformity can be realized. Since the surface of the light shielding film 7 is not oxidized, the thickness of the light shielding film 7 can be reduced. Thus, the present invention can comply with the demand for size reduction of the pixels.

Abstract: A semiconductor memory device has an information storing circuit such as a fuse box as well as a memory cell array with redundant memory cells that can be used to replace defective memory cells. Address information indicating which memory cells have been replaced is stored in the information storing circuit, which also stores information identifying the semiconductor memory device. In one testing mode, the identifying information is output in response to input to a series of address signals that would normally select memory cells in the memory cell array. In another testing mode, roll call results are output indicating whether each input address matches an address stored in the information storing circuit. Use of address signals to elicit output of both identifying and roll call information saves space in the memory device.

Abstract: In a solid-state imaging device, a light-shielding film 10a is formed of at least one of a high melting point metal film or a high melting point metal compound film. The surface of the light-shielding film 10a is constituted by an amorphous silicon film 13. Instead of the amorphous silicon film 13, the surface of the light-shielding film may be covered with any one of a high melting point metal film containing silicon, a high melting point metal silicide film and an oxide film. Thus, the adherence between the light-shielding film 10a and the resist can be increased and the resist can be prevented from being peeled from the light-shielding film, and thus a solid-state imaging device with a high yield even with small pixels and a method for producing the same can be provided.

Abstract: A semiconductor memory device having a data bus connecting a differential amplifier circuit of a memory cell array, which uses the differential amplifier circuit as input/output terminals of data to the selected memory cells out of a plurality of memory cells, with a plurality of input/output pads for writing and reading data to and from the memory cells. The data bus has a plurality of write data lines and a plurality of read data lines. The write and read data lines of the data bus are arranged in parallel with one another. The two kinds of data lines are arranged alternately in the direction in which they are arranged, and one kind of the data lines serves as the shielding lines for the other other kind of data lines.

Abstract: A semiconductor memory device includes first through fourth memory blocks. A first block-selection signal is used to select the first and third memory blocks, to output data from the first memory block to the first data line and also to output data from the fourth memory block to the second data line. A second block-selection signal is used to select the second and third memory blocks, to output data from the second memory block to the second data line and also to output data from the third memory block to the first data line.

Abstract: Signals inputted from nodes N2 and N4 to output circuit 100 are respectively transmitted to clocked inverters 31 and 32. Clocked inverter 31 is activated when node N4 is H level while clocked inverter 32 is activated when node N2 is L level. Output signal of clocked inverter 31 is supplied to gate electrode of PMOS 61 via node N5 while output signal of clocked inverter 32 is supplied to gate electrode of NMOS 62 via node N6. Voltage level of node N5 is pulled up when node N4 is L level while voltage level of node N6 is pulled down when node N2 is H level. With such a construction, it is possible to provide the output circuit capable of reducing feedthrough current without deteriorating high speed responsivity.

Abstract: A terminal, such as character display unit or printer, has a character pattern memory region. A host system controls an operation of outputting a character to the terminal. In case of outputting a desired character to the terminal, firstly an examination is made at the side of the host system as to whether or not a character pattern corresponding to the desired character is stored in the character pattern memory region. When it is determined that the character pattern has not been stored in the character pattern memory region, the character pattern from the host system is loaded into the character pattern memory region.