Abstract: An instruction execution control apparatus is configured to acquire correspondence information. The correspondence information associates a non-common instruction with a common instruction. The non-common instruction is an instruction not executable by a first processor but executable by a second processor. The common instruction is an instruction executable by both the first processor and the second processor. The instruction execution control apparatus is configured to use the correspondence information to specify the common instruction corresponding to the non-common instruction in response to the detection of the non-common instruction in the first processor. The instruction execution control apparatus causes the first processor to execute the specified common instruction.

Abstract: A bus control system includes bus masters connected to a common bus and a bus slave for transferring data with one bus master by arbitration. The bus control system further includes a live-lock controller connected to the bus slave and controlling the data transfer. The live-lock controller counts a retry response to one bus master and sets priority for preferentially accepting an access request from this bus master according to the count value. When the live-lock controller receives an access request from the other bus master, it sends a retry response to that bus master.