Abstract: A generation apparatus of writing error verification data for a pattern writing apparatus includes a data extraction part configured to extract, from layout data including a figure pattern to be written, part of the layout data required for an operation of a function having a writing error occurred after starting writing by the pattern writing apparatus which performs writing on a target workpiece based on the layout data, and a verification data generation part configured to perform a merge process based on extracted part of the layout data, and to generate writing error verification data, for which the merge process has been performed, for verifying the writing error of the pattern writing apparatus.

Abstract: A charged-particle beam writing apparatus includes first and second storage devices, a transfer processor for sequentially sending to the first storage several design data files per pattern layout-defined region, a first data processor which sequentially reads design data files from the first storage and converts each data file's design data into draw data for storage in the second storage while being pipelined with the transfer processing, second to n-th data processors which sequentially read data files from the second storage and apply mutually different ones of second to n-th data processings to each draw data in a way that the first to n-th data processings are pipelined and store the processed draw data in the second storage, and a pattern-writing unit for writing a pattern on a workpiece by using a beam that is controlled based on each n-th data processing-completed data being stored in the second storage.

Abstract: A method of forming pattern writing data to write a predetermined pattern from layout data of a circuit by using a charged particle beam while deflecting the charged particle beam, includes inputting the layout data including a pattern ranging over a plurality of deflection regions, generating a partial pattern which can be deflected in a self region in the ranging pattern for each of the plurality of deflection regions on the basis of the input layout data, and converting layout data including a partial pattern for each of the deflection regions into charged particle beam pattern writing data to output the charged particle beam pattern writing data.

Abstract: A creation method of charged particle beam writing data for writing a pattern using a charged particle beam based on design data of circuits includes creating, based on the design data, a location data file including location data, as part of the writing data, the location data being defined for locating one of a plurality of pattern data composed of one or more elementary patterns in each block area of a plurality of block areas, the plurality of block areas being made by virtually dividing a writing area, creating, based on the design data, a pattern data file including pattern data composed of one or more elementary patterns, as part of the writing data, and creating, based on the design data, a link file including link data for linking each of the location data and each of the pattern data, as part of the writing data.

Abstract: A charged beam exposure system has a movable stage for supporting a specimen; a charged beam generator; a main deflector for deflecting the charged beam; a stage moving unit for moving the movable stage in a scanning direction; a pattern writing time calculation unit, and writing speed calculation unit and controller for performing pattern writing using the writing speed. For multi pass writing, a plurality of stripes cover one frame. The writing speed is obtained, for blocks which are partitioned into a fixed or arbitrary number of segments taking a pattern density within a frame (stripe) field.

Abstract: A pattern lithography system for lithographing a pattern with reference to a pattern data by deflecting an electron beam includes a controller, an extracting unit, a dividing unit, and an expansion unit. The controller analyzes the pattern data and determines stripes of the pattern to be successively lithographed. The extracting unit extracts parts of the pattern data corresponding to stripes of the pattern in response to commands from the controller and sends the data to the dividing unit. The dividing unit divides the part of the pattern data into a plurality of sub-patterns. The sub-patterns are sized smaller than a minimum deflection range of the electron beam. The expanding unit expands the sub-patterns in accordance with a command from the controller to produce stripe data for driving a lithographing unit to lithograph the stripe. Stripes may have at least one sub-pattern in common such that multiple lithography is performed.

Abstract: A charged beam lithography system includes a charged particle gun for generating charged beams, a main deflecting system and a sub-deflecting system for deflecting the charged beams generated by the charged particle gun, and a control computer. The charged beam lithography system is designed to cause the surface of a substrate to be irradiated with the charged beams from the charged particle gun while continuously moving a stage, to write a desired pattern for each of stripes defined by the maximum deflection widths of the main deflecting system and the sub-deflecting system. The charged beam lithography system further comprises: a real time proximity effect correcting circuit for calculating an optimum dosage for each of the stripes by correcting the dosage of the electron beams in view of the influence of the proximity effect; and a cash memory for storing the optimum dosage data for at least two of the stripes.

Abstract: The present invention provides a method of manufacturing a circuit element which includes a step of performing first exposure for transferring a pattern having a narrowed portion for forming a particular pattern, onto an exposure-target substrate, and a step of moving the pattern in a direction not parallel to a segment forming an outer circumference of the narrowed portion and performing second exposure for transferring the pattern onto the exposure-target substrate.

Abstract: In a method of generating from design data the exposure data necessary for a multistage-deflection charged beam exposure device that has a main deflector and a sub-deflector and forms a pattern, before a shape larger than the size of a minimum subfield area is divided during the generation of subfield exposure data, the process of dividing the shape into shapes equal to or smaller than the size of a subfield area and restructuring the shape is performed. Moreover, after the overlapping cell arrays in the design data are changed into a cell array structure preventing the cell arrays from overlapping, the resulting cell arrays are subjected to a hierarchical shape data operation process and a formatting process, including compression, subfield division, and frame division. This makes it possible to reduce the amount of data supplied without increasing the time required to converting the design data into exposure data supplied to the charged beam exposure device.

Abstract: According to the present invention, there is provided a correlation tunnel device capable of achieving a low power consumption without decreasing a drive force when a large-scale-integrated circuit is constituted.

Abstract: A stable output can be obtained with respect to the input level fluctuations. Two impedance elements 1 and 2 each having a single-electron tunnel junction are connected in series. The tunnel resistances R.sub.1 and R.sub.2 and the junction capacitances C.sub.1 and C.sub.2 of the respective impedance elements 1 and 2 are determined as R.sub.1 >R.sub.2 and C.sub.1 .gtoreq.C.sub.2 or R.sub.1 <R.sub.2 and C.sub.1 .gtoreq.C.sub.2. By this, the charge stored on the island portion 4 can be quantized at a roughly integral value times the prime charge e according to the input voltage, the current-voltage characteristics represent Coulomb staircase, a square-shaped Coulomb oscillation characteristics can be obtained, and a constant output current value to an input voltage range with constant width can be obtained, so that it is possible to widen the voltage margin corresponding to the respective input logical level. A stable output can be obtained against the input voltage fluctuations.