Patents by Inventor Hitoshi Komae

Hitoshi Komae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5228041
    Abstract: There is provided a signal processing system for recording and reproducing a video signal and a digital audio signal with a rotary-head VTR and, more particularly, a memory control system which generates a block address and a memory write signal so that the sync signal for reproduced digital data is detected reliably and the digital data is stored in the memory circuit correctly.
    Type: Grant
    Filed: December 17, 1990
    Date of Patent: July 13, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadashi Yoshino, Susumu Yamaguchi, Hitoshi Komae, Tetsuo Ishiwata, Eiji Yamauchi, Hiroshi Tanaka
  • Patent number: 5068752
    Abstract: A signal processing system for absorbing asynchronism between a video signal and an audio signal which is caused when a PCM audio signal is to be recorded together with the video signal on a helical scan-type tape recorder. When the video signal and the audio signal are recorded on the same track, a recording band width of the audio signal should be narrow. A sample pattern is provided which assures rapid pull-in for both data clock reproduction and carrier reproduction, when the audio signal is modulated by QPSK or when Q-QPSK modulation is used.
    Type: Grant
    Filed: September 26, 1988
    Date of Patent: November 26, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Tanaka, Tetsuo Ishiwata, Shuzo Hitotsumachi, Hitoshi Komae, Susumu Yamaguchi, Tadashi Yoshino, Eiji Yamauchi
  • Patent number: 5021897
    Abstract: There is provided a signal processing system for recording and reproducing a video signal and a digital audio signal with a rotary-head VTR and, more particularly, a memory control system which generates a block address and a memory write signal so that the sync signal for reproduced digital data is detected reliably and the digital data is stored in the memory circuit correctly.
    Type: Grant
    Filed: June 7, 1988
    Date of Patent: June 4, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadashi Yoshino, Susumu Yamaguchi, Hitoshi Komae, Tetsuo Ishiwata, Eiji Yamauchi, Hiroshi Tanaka