Patents by Inventor Hitoshi Komuro

Hitoshi Komuro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010015802
    Abstract: A defect inspection apparatus for detecting defects existing on a surface of a semiconductor sample and/or inside the sample based on light information from the sample obtained by irradiating a light beam onto the sample is provided, which comprises a detecting means for detecting positions in the depth direction where the defects exist and distribution of the defects based on the light information; a setting means for setting a position in the depth direction where defects exist; and a means for displaying the distribution of the defects obtained by the detecting means, the displaying means displaying the distribution of the defects corresponding to the position in the depth direction set by the setting means.
    Type: Application
    Filed: April 27, 2001
    Publication date: August 23, 2001
    Inventors: Koji Tomita, Muneo Maeshima, Shigeru Matsui, Yoshitaka Kodama, Hitoshi Komuro, Kazuo Takeda
  • Patent number: 6256092
    Abstract: A defect inspection apparatus for detecting defects existing on a surface of a semiconductor sample and/or inside the sample based on light information from the sample obtained by irradiating a light beam onto the sample is provided, which comprises a detecting means for detecting positions in the depth direction where the defects exist and distribution of the defects based on the light information; a setting means for setting a position in the depth direction where defects exist; and a means for displaying the distribution of the defects obtained by the detecting means, the displaying means displaying the distribution of the defects corresponding to the position in the depth direction set by the setting means.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: July 3, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Koji Tomita, Muneo Maeshima, Shigeru Matsui, Yoshitaka Kodama, Hitoshi Komuro, Kazuo Takeda
  • Patent number: 6157444
    Abstract: In order to easily evaluate defects of the silicon wafer affecting the characteristic of a device, the present invention provides a defect inspection apparatus for detecting defects existing on a surface of a sample and/or inside the sample, which comprises a display apparatus for displaying a distribution of the defects on a graph having coordinate axes of distance from a central position of the sample and the depth where the defect exists based on the depth information and the positional information obtained by a detecting means.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: December 5, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Koji Tomita, Muneo Maeshima, Shigeru Matsui, Hitoshi Komuro, Kazuo Takeda
  • Patent number: 5554863
    Abstract: A gate turn-off thyristor including: an n-type emitter semiconductor layer divided into a plurality of n-type areas; a p-type base semiconductor layer which cooperates with the n-type emitter semiconductor layer to form a first main circular surface; an n-type base semiconductor layer; and a p-type emitter semiconductor layer cooperating with the n-type base semiconductor layer to form a second main circular surface. An outer diameter of the p-type emitter semiconductor layer is smaller than that of the n-type emitter semiconductor layer. A first main electrode put in low resistance contact with the n-type emitter semiconductor layer is formed on the first main surface. A second main electrode put in low resistance contact with the p-type emitter layer and the n-type base semiconductor layer is formed on the second main surface. A control electrode is formed in the p-type base semiconductor on the first main surface.
    Type: Grant
    Filed: June 15, 1994
    Date of Patent: September 10, 1996
    Assignees: Hitachi, Ltd., Hitachi Haramachi Electronics Co., Ltd.
    Inventors: Sigeyasu Kouzuchi, Shuroku Sakurada, Takashi Saitoh, Hitoshi Komuro
  • Patent number: 5314078
    Abstract: An article storage rack apparatus for storing and dispensing articles in first-in, first-out order comprises side-by-side columns of slant racks, in which alternate slant racks in each column are inclined downwardly in opposite direction. Articles are introduced onto the topmost slant rack and slide downward by gravity to successively lower slant racks. The articles are transferred from a slant rack to the next lower slant rack by a transfer mechanism comprising tables which are movable vertically and tiltable. The articles are maintained in the same orientation as they slide down the array of slant racks. At the lower end of the bottom slant rack, the articles are dispensed, by a tilting table dispenser, in the same order in which they were introduced onto the top slant rack.
    Type: Grant
    Filed: September 8, 1992
    Date of Patent: May 24, 1994
    Assignee: Tsubakimoto Chain Co.
    Inventors: Akira Morikiyo, Toshio Kanbe, Shuichi Shinbo, Shigeru Yoshikawa, Yoshikazu Shimodaira, Kazuya Ohminami, Hitoshi Komuro
  • Patent number: 5096047
    Abstract: A basket for a basket conveyor comprising a plurality of bottom-opening baskets is disclosed. The basket is characterized in that side plates thereof spread upwardly so as to enlarge the article receiving opening sidewardly. The internal walls of the basket may be provided with projections so as to enable smooth discharging of the articles when the bottom cover is opened. Moreover, complimentary projections and channels may be provided to the edge of the article discharging port and the upper surface of the bottom cover respectively in the direction of opening and closing of the bottom cover to prevent jamming of the sorted articles.
    Type: Grant
    Filed: May 16, 1990
    Date of Patent: March 17, 1992
    Assignee: Tsubakimoto Chain Co.
    Inventors: Akira Morikiyo, Hitoshi Komuro, Ryosuke Shiibashi