Patents by Inventor Hitoshi Matsumura

Hitoshi Matsumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180233464
    Abstract: A semiconductor modules includes insulating substrates having first and second patterns thereon. One terminal plate connects the first patterns and another terminal plate connects the second patterns. A first and a second switching chip are provided on the first pattern. Bonding wires connect the first ans second chips to the second pattern. An insulating plate with an auxillary conductor theron is disposed on the first pattern between the second pattern and both the first and second chips. A first auxiliary connection connect the auxiliary conductor and the second chip and a second auxilliary connection connect thes auxiliary conductor and the second pattern. The auxiliary connections may be, for example, bonding wires or solder connections.
    Type: Application
    Filed: August 28, 2017
    Publication date: August 16, 2018
    Inventors: Nobumitsu TADA, Hiroaki ITO, Kazuya KODANI, Toshiharu OHBU, Hiroki SEKIYA, Yuuji HISAZATO, Hitoshi MATSUMURA
  • Patent number: 9795049
    Abstract: A semiconductor device includes a base plate, a semiconductor chip, and a first to a fourth terminal plates. The first terminal plate includes a first main body unit. The second terminal plate includes a second main body unit. The second main body unit opposes the first main body unit. The third terminal plate includes a third main body unit. The third main body unit opposes the first main body unit and the second main body unit. The fourth terminal plate includes a fourth main body unit. The fourth main body unit opposes the third main body unit. A thickness of the third main body unit is thinner than a thickness of the first main body unit. A thickness of the fourth main body unit is thinner than a thickness of the second main body unit.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: October 17, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobumitsu Tada, Kazuya Kodani, Hiroaki Ito, Toshiharu Ohbu, Hitoshi Matsumura
  • Patent number: 9481436
    Abstract: A shift control device of an outboard motor having an electrical shift device for switching a propulsion direction has a rotation switching unit electrically switching whether to drive the outboard motor for regular rotation or for counter rotation, and a rotation determination unit determining whether the outboard motor drives for regular rotation or for counter rotation. Desired performances can be obtained by the outboard motor for regular rotation and the outboard motor for counter rotation without complicating the operation even when the propulsion unit for regular rotation and the propulsion unit for counter rotation are made as a common unit.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: November 1, 2016
    Assignee: SUZUKI MOTOR CORPORATION
    Inventors: Nobuyuki Shomura, Hitoshi Matsumura, Masahiro Nanba
  • Patent number: 9466558
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element, amounting substrate which has wiring layers containing copper, and a joining layer which is provided between the semiconductor element and the wiring layer and made of an alloy containing copper and metal other than copper, and in which a melting point of the alloy is higher than a melting point of the metal.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: October 11, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yo Sasaki, Atsushi Yamamoto, Yuuji Hisazato, Hitoshi Matsumura
  • Patent number: 9347391
    Abstract: An air-fuel ratio control device has an open loop controller which controls an air-fuel ratio to be a target air-fuel ratio, a feedback controller that shifts the target air-fuel ratio to a logical air-fuel ratio, and feedback controls the air-fuel ratio to be the logical air-fuel ratio by using a feedback correction coefficient determined based on an output of an O2 sensor, an average value calculator that calculates an average value of the feedback correction coefficient when the output of the O2 sensor reverses from a lean side to a rich side and from the rich side to the lean side in a feedback control by the feedback controller, and a learned value calculator that calculates a learned value based on the average value at a time when the average value calculated by the average value calculator becomes substantially constant.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: May 24, 2016
    Assignee: SUZUKI MOTOR CORPORATION
    Inventors: Masahiro Nanba, Tomohiko Miyaki, Hitoshi Matsumura
  • Publication number: 20160057881
    Abstract: A semiconductor device includes a base plate, a semiconductor chip, and a first to a fourth terminal plates. The first terminal plate includes a first main body unit. The second terminal plate includes a second main body unit. The second main body unit opposes the first main body unit. The third terminal plate includes a third main body unit. The third main body unit opposes the first main body unit and the second main body unit. The fourth terminal plate includes a fourth main body unit. The fourth main body unit opposes the third main body unit. A thickness of the third main body unit is thinner than a thickness of the first main body unit. A thickness of the fourth main body unit is thinner than a thickness of the second main body unit.
    Type: Application
    Filed: February 19, 2015
    Publication date: February 25, 2016
    Inventors: Nobumitsu Tada, Kazuya Kodani, Hiroaki Ito, Toshiharu Ohbu, Hitoshi Matsumura
  • Publication number: 20150360762
    Abstract: A shift control device of an outboard motor having an electrical shift device for switching a propulsion direction has a rotation switching unit electrically switching whether to drive the outboard motor for regular rotation or for counter rotation, and a rotation determination unit determining whether the outboard motor drives for regular rotation or for counter rotation. Desired performances can be obtained by the outboard motor for regular rotation and the outboard motor for counter rotation without complicating the operation even when the propulsion unit for regular rotation and the propulsion unit for counter rotation are made as a common unit.
    Type: Application
    Filed: June 12, 2013
    Publication date: December 17, 2015
    Applicant: SUZUKI MOTOR CORPORATION
    Inventors: Nobuyuki SHOMURA, Hitoshi MATSUMURA, Masahiro NANBA
  • Publication number: 20150262959
    Abstract: A semiconductor device includes a substrate joined to a base by a first junction material and a semiconductor element joined to the substrate by a second junction material. At least one of the first and second junction materials comprises tin, antimony, and cobalt. In some embodiments, the junction materials comprise cobalt having a weight percentage between 0.05 wt % and 0.2 wt %, antimony with a weight percentage between 1 wt % and 10 wt %, and the balance being substantially tin.
    Type: Application
    Filed: September 2, 2014
    Publication date: September 17, 2015
    Inventors: Yuuji HISAZATO, Kazuya KODANI, Yo SASAKI, Daisuke HIRATSUKA, Hitoshi MATSUMURA, Hideaki KITAZAWA, Nobumitsu TADA, Hiroki SEKIYA
  • Publication number: 20150249046
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element, amounting substrate which has wiring layers containing copper, and a joining layer which is provided between the semiconductor element and the wiring layer and made of an alloy containing copper and metal other than copper, and in which a melting point of the alloy is higher than a melting point of the metal.
    Type: Application
    Filed: July 31, 2014
    Publication date: September 3, 2015
    Inventors: YO SASAKI, Atsushi Yamamoto, Yuuji Hisazato, Hitoshi Matsumura
  • Patent number: 9123704
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element, an interconnection layer, and a bonding layer. The interconnection layer includes Cu. The bonding layer includes a first alloy that is an alloy of Cu and a first metal other than Cu between the semiconductor element and the interconnection layer. A melting point of the first alloy is higher than a melting point of the first metal.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: September 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yo Sasaki, Yuuji Hisazato, Kazuya Kodani, Atsushi Yamamoto, Hitoshi Matsumura
  • Publication number: 20150244191
    Abstract: This battery monitoring system quickly and accurately grasps the position of a monitoring device that monitors battery packs when an abnormality occurs in the monitoring device. The battery monitoring system is equipped with a comparison unit and a change unit. When a battery management unit (BMU) which acquires, from each of a plurality of cell monitoring units (CMUs) that monitor a plurality of battery packs provided with at least one secondary battery cell, battery state information for the associated battery pack, activates a particular CMU according to a predetermined sequence, the comparison unit compares the sequence number representing the sequence in which the CMU was activated with an identification number assigned to the CMU acquired from the CMU. If the sequence number and the identification number differ, the change unit changes the identification number to the same number as the sequence number, and outputs the new identification number.
    Type: Application
    Filed: November 19, 2013
    Publication date: August 27, 2015
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Hitoshi Matsumura, Akira Takeyama
  • Publication number: 20150076516
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element and a metal film. The semiconductor element has a first surface and a second surface opposite to the first surface. The metal film is provided above the second surface of the semiconductor element. The metal film includes Cr.
    Type: Application
    Filed: March 10, 2014
    Publication date: March 19, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yuuji Hisazato, Hiroki Sekiya, Yo Sasaki, Kazuya Kodani, Nobumitsu Tada, Hitoshi Matsumura, Tomohiro Iguchi
  • Publication number: 20150078414
    Abstract: According to one embodiment, in a method of testing a semiconductor device, the semiconductor device has a semiconductor element and a substrate which are bonded by bonding material including metal fine particles. Image data of a heat distribution in the semiconductor device are temporally acquired while heating the semiconductor device. A time change of a fractal dimension based on the image data is calculated. An inclination of the time change of the fractal dimension is calculated. The inclination and a reference inclination set in advance are compared. Whether or not the semiconductor device is good is determined.
    Type: Application
    Filed: March 3, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuuji Hisazato, Kazuya Kodani, Yo Sasaki, Daisuke Hiratsuka, Hitoshi Matsumura, Hideaki Kitazawa, Kenji Adachi
  • Publication number: 20150076699
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element, an interconnection layer, and a bonding layer. The interconnection layer includes Cu. The bonding layer includes a first alloy that is an alloy of Cu and a first metal other than Cu between the semiconductor element and the interconnection layer. A melting point of the first alloy is higher than a melting point of the first metal.
    Type: Application
    Filed: March 11, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yo Sasaki, Yuuji Hisazato, Kazuya Kodani, Atsushi Yamamoto, Hitoshi Matsumura
  • Patent number: 8957522
    Abstract: According to one embodiment, the semiconductor device in the embodiment has an assembly substrate, a semiconductor chip, and a jointing layer. The semiconductor chip is joined to the assembly substrate via the jointing layer. An intervening diffusion barrier layer may be interposed between the chip and jointing layer. The jointing layer is an alloy layer mainly made of any metal selected from Sn, Zn and In or an alloy of Sn, Zn and In, and any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V or an alloy of any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V and any metal selected from Sn, Zn and In, where the alloy has a higher melting temperature than that of Sn, Zn and In or an alloy of Sn, Zn and/or In.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: February 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yo Sasaki, Daisuke Hiratsuka, Atsushi Yamamoto, Kazuya Kodani, Yuuji Hisazato, Hitoshi Matsumura
  • Publication number: 20140284797
    Abstract: A method for fabricating a power semiconductor device that comprises a base substrate with a conductive layer on a surface of the base substrate and semiconductor components mounted on the base substrate includes forming a hardened layer on the surface of the conductive layer before mounting a semiconductor component on the base substrate. The forming of the hardened layer may optionally be performed using a peening process, for example, a shot peening process, a laser peening process, or an ultrasonic peening process. The conductive layer may comprise a metal such as, for example, aluminum or copper.
    Type: Application
    Filed: September 3, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuuji HISAZATO, Hiroki SEKIYA, Yo SASAKI, Kazuya KODANI, Nobumitsu TADA, Hitoshi MATSUMURA, Tomohiro IGUCHI
  • Publication number: 20140077377
    Abstract: According to one embodiment, the semiconductor device in the embodiment has an assembly substrate, a semiconductor chip, and a jointing layer. The semiconductor chip is joined to the assembly substrate via the jointing layer. An intervening diffusion barrier layer may be interposed between the chip and jointing layer. The jointing layer is an alloy layer mainly made of any metal selected from Sn, Zn and In or an alloy of Sn, Zn and In, and any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V or an alloy of any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V and any metal selected from Sn, Zn and In, where the alloy has a higher melting temperature than that of Sn, Zn and In or an alloy of Sn, Zn and/or In.
    Type: Application
    Filed: March 6, 2013
    Publication date: March 20, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yo SASAKI, Daisuke HIRATSUKA, Atsushi YAMAMOTO, Kazuya KODANI, Yuuji HISAZATO, Hitoshi MATSUMURA
  • Patent number: 8463564
    Abstract: An abnormality prediction system for secondary batteries according to the present invention includes: a parameter value detection portion that detects parameter values each corresponding to each of a plurality of secondary batteries to determine whether all the parameter values are normal or not; and a singular state determination portion that determines, if a difference between a reference value calculated by use of all the parameter values determined to be normal by the parameter value detection portion and at least one of the parameter values is not less than a threshold value, the secondary battery corresponding to the parameter value with the difference not less than the threshold value to be in a state different from those of the other secondary batteries out of the plurality of secondary batteries.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: June 11, 2013
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Hitoshi Matsumura, Masazumi Ohishi, Masataka Uchida, Katsuaki Kobayashi, Tetsuro Shigemizu, Hidehiko Tajima
  • Publication number: 20110101987
    Abstract: An abnormality determination system may include a secondary battery that includes a battery case including a positive terminal and a negative terminal, a switch unit that connects electrically the positive terminal to the battery case based on a first control signal, the switch unit breaking electrically a connection between the positive terminal and the battery case based on a second control signal, a voltage measurement unit that measures a voltage of the battery case, and a determination unit that determines an abnormality of the secondary battery based on the voltage.
    Type: Application
    Filed: November 2, 2010
    Publication date: May 5, 2011
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventor: Hitoshi Matsumura
  • Publication number: 20110077881
    Abstract: An abnormality prediction system for secondary batteries according to the present invention includes: a parameter value detection portion that detects parameter values each corresponding to each of a plurality of secondary batteries to determine whether all the parameter values are normal or not; and a singular state determination portion that determines, if a difference between a reference value calculated by use of all the parameter values determined to be normal by the parameter value detection portion and at least one of the parameter values is not less than a threshold value, the secondary battery corresponding to the parameter value with the difference not less than the threshold value to be in a state different from those of the other secondary batteries out of the plurality of secondary batteries.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 31, 2011
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Hitoshi Matsumura, Masazumi Ohishi, Masataka Uchida, Katsuaki Kobayashi, Tetsuro Shigemizu, Hidehiko Tajima