Patents by Inventor Hitoshi Miyamoto
Hitoshi Miyamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7715205Abstract: A self-excited inverter circuit, includes: a booster transformer with a secondary coil, a feedback coil, and a primary coil respectively wound thereon, the primary coil including a center tap to which operating power can be supplied; a first N-channel FET having a drain to which is connected one terminal of the primary coil, and having a gate to which is connected one terminal of the feedback coil; and a second N-channel FET having a drain to which is connected the other terminal of the primary coil, and having a gate to which is connected the other terminal of the feedback coil, wherein: using a high voltage drive output generated in the secondary coil when the first and second N-channel FETs are turned on alternately, a discharge tube is driven and turned on; and the first and second N-channel FETs are both formed in a single package.Type: GrantFiled: July 26, 2006Date of Patent: May 11, 2010Assignee: Funai Electric Co., Ltd.Inventor: Hitoshi Miyamoto
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Publication number: 20100111326Abstract: A first microphone device according to the present invention comprises a pair of directional microphones with high directivity in a sound collecting direction, a pair of nondirectional microphones with low directivity in the sound collecting direction, and a casing accommodating the pair of directional microphones and the pair of nondirectional microphones. The pair of nondirectional microphones is arranged so that sound collecting directions thereof are outward from both side surface walls of the casing, while the pair of directional microphones is arranged so that sound collecting directions thereof are outward from a front surface wall of the casing and intersect each other in vicinity of the front surface wall. All or a part of the pair of directional microphones is accommodated in a space sandwiched by the pair of nondirectional microphones.Type: ApplicationFiled: November 4, 2009Publication date: May 6, 2010Applicant: SANYO ELECTRIC CO., LTD.Inventors: Yasushi OBATA, Hitoshi MIYAMOTO, Hiroyoshi SATO, Shinya UCHIDA
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Patent number: 7638905Abstract: A circuit that can avoid drops in power supply and heat generation and save on manufacturing costs with no need of external controls are configured such that: a switching transformer has a terminal that produces an output of 22V at power-on and an output of 8V during standby and a terminal that produces an output of 10V at power-on and an output of 3V during standby; the output of 22V or 8V is lowered to 5V by a regulator IC1 and applied (input) to a regulator IC2; an input of 10V or 3V is produced at the regulator IC2; at power-on, the regulator IC2 lowers 10V to 3.3V and supplies the lowered 3.3V to the inverter circuit 10f; and during standby, a regulator IC lowers 8V to 3.3V and supplies the lowered 3.3V to the inverter circuit 10f.Type: GrantFiled: July 11, 2007Date of Patent: December 29, 2009Assignee: Funai Electric Co., Ltd.Inventor: Hitoshi Miyamoto
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Patent number: 7574273Abstract: An audio recording device is provided with a first casing, which includes a sound collection means, a second casing, which includes a terminal for connection to an external device. One end portion of the second casing is rotatably joined to a lower end portion of the first casing, such that the second casing can be folded and stored on a rear side of the first casing; the sound collection means is provided at an upper portion of the first casing; and the connection terminal is protrudingly provided on another end portion of the second casing. Furthermore, a recessed portion, into which the connection terminal is fitted, may be formed at a raised portion on the rear side of the first casing, and a front end portion of the connection terminal may be covered by a wall of the recessed portion when the second casing is in a folded and stored state.Type: GrantFiled: August 7, 2003Date of Patent: August 11, 2009Assignees: Sanyo Electric Co., Ltd., Sanyo Technosound Co., Ltd.Inventors: Yasushi Obata, Hitoshi Miyamoto, Toshihiro Waguri
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Publication number: 20090060247Abstract: A microphone device according to the present invention comprises a plurality of microphones and a microphone holder for holding the microphones. The microphones include a first sound receiving part and a second sound receiving part. The microphone holder comprises a holder body, and the holder body includes a plurality of microphone engaging recesses facing in different directions from each other and to be removably in engagement with the plurality of microphones. These microphone engaging recesses are to be in engagement with the plurality of microphones with the first sound receiving part facing the outer side of the holder body.Type: ApplicationFiled: August 28, 2008Publication date: March 5, 2009Applicant: SANYO ELECTRIC CO., LTD.Inventors: Yoshiho SUZUKI, Hitoshi MIYAMOTO
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Publication number: 20090033810Abstract: A self-excited inverter comprises a pair of switching devices and a transformer having a primary side to which the switching devices are connected and a secondary side to which a lamp is connected. A pulse voltage is applied alternately to gates of the individual switching devices through a drive winding of the transformer, causing the switching devices to turn on and off in alternate turns to produce an AC voltage which is supplied from a pair of main windings of the transformer to the secondary side thereof. An input voltage supplied to the main windings of the transformer is divided by a voltage divider circuit configured with a plurality of resistors and voltages divided by the voltage divider circuit are applied to the gates of the individual switching devices so that the startup voltage follows the input voltage.Type: ApplicationFiled: July 30, 2008Publication date: February 5, 2009Applicant: FUNAI ELECTRIC CO., LTD.Inventors: Hitoshi Miyamoto, Takashi Jinnouchi
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Publication number: 20090033237Abstract: A fluorescent tube power supply including a rectification circuit, a smoothing circuit, an inverter, and a control circuit for controlling the inverter, further includes a current detecting unit for detecting an input current of the inverter. The control circuit is stopped based on an output signal of the current detecting unit when the input current increases.Type: ApplicationFiled: August 1, 2008Publication date: February 5, 2009Applicant: FUNAI ELECTRIC CO., LTD.Inventor: Hitoshi Miyamoto
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Publication number: 20090026974Abstract: A fluorescent tube power supply including an inverter power supply which outputs a DC voltage, and an inverter which converts an output of the inverter power supply to an AC; wherein a power stabilizing unit for stabilizing a power input to the inverter is arranged between the inverter power supply and the inverter; and a feedback control of the inverter power supply is performed based on an output of the power stabilizing unit. The power stabilizing unit detects a current flowing between the inverter power supply and the inverter, and the feedback control of the inverter power supply is performed based on the current.Type: ApplicationFiled: July 28, 2008Publication date: January 29, 2009Applicant: Funai Electric Co., Ltd.Inventors: Hitoshi Miyamoto, Takashi Jinnouchi
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Publication number: 20080252796Abstract: A liquid crystal television 100 displays an image on a liquid crystal display by transmitting a light source from a backlight unit 10. The backlight unit 10 drives two cold-cathode tubes 13a, 13b as the backlight 13 at the high frequency voltages each with different polarity generated by a self-excited inverter circuit 11 to generate a light source. The backlight unit 10 connects an inter-lamp coil L2 between two U-shaped cold-cathode tubes 13a, 13b to form a series circuit, and further connects capacitors C5, C6 in parallel with the cold-cathode tubes 13a, 13b.Type: ApplicationFiled: March 28, 2008Publication date: October 16, 2008Applicant: Funai Electric Co., Ltd.Inventor: Hitoshi MIYAMOTO
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Publication number: 20080165305Abstract: The present invention discloses a lighting unit comprising: a reflector panel; a plurality of substantially U-shaped cold cathode tubes held parallel relative to the reflector panel; an inverter substrate; cold cathode tube holders for holding the cold cathode tubes parallel relative to the reflector panel in such a manner that terminals of the cold cathode tubes are arranged in a row along one side of the reflector panel; a substrate holder for holding the inverter substrate to be vertically relative to the reflector panel in such a manner that a lower side of the inverter substrate reaches a positions where the terminals are arranged in a row; a plurality of notches upwardly cut deep from the lower side of the inverter substrate so as to receive the terminals; and solders provided for making electrical connections between the terminals and electrical supply patterns formed in the notches.Type: ApplicationFiled: January 7, 2008Publication date: July 10, 2008Applicant: Funai Electric Co., Ltd.Inventor: Hitoshi Miyamoto
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Publication number: 20080048768Abstract: A circuit that can avoid drops in power supply and heat generation and save on manufacturing costs with no need of external controls are configured such that: a switching transformer has a terminal that produces an output of 22V at power-on and an output of 8V during standby and a terminal that produces an output of 10V at power-on and an output of 3V during standby; the output of 22V or 8V is lowered to 5V by a regulator IC1 and applied (input) to a regulator IC2; an input of 10V or 3V is produced at the regulator IC2; at power-on, the regulator IC2 lowers 10V to 3.3V and supplies the lowered 3.3V to the inverter circuit 10f, and during standby, a regulator IC lowers 8V to 3.3V and supplies the lowered 3.3V to the inverter circuit 10f.Type: ApplicationFiled: July 11, 2007Publication date: February 28, 2008Applicant: Funai Electric Co., Ltd.Inventor: Hitoshi Miyamoto
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Publication number: 20070046328Abstract: A self-excited inverter circuit, includes: a booster transformer with a secondary coil, a feedback coil, and a primary coil respectively wound thereon, the primary coil including a center tap to which operating power can be supplied; a first N-channel FET having a drain to which is connected one terminal of the primary coil, and having a gate to which is connected one terminal of the feedback coil; and a second N-channel FET having a drain to which is connected the other terminal of the primary coil, and having a gate to which is connected the other terminal of the feedback coil, wherein: using a high voltage drive output generated in the secondary coil when the first and second N-channel FETs are turned on alternately, a discharge tube is driven and turned on; and the first and second N-channel FETs are both formed in a single package.Type: ApplicationFiled: July 26, 2006Publication date: March 1, 2007Applicant: Funai Electric Co., Ltd.Inventor: Hitoshi Miyamoto
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Patent number: 7161310Abstract: A secondary winding W2 of a step-up transformer of a self-excited inverter 2 is grounded at the midpoint thereof. High-frequency voltages differing in polarity from each other are outputted from both terminals OT1 and OT2 of the secondary winding W2. Two U-shaped cold-cathode tubes L1 and L2 series-connected to each other are provided directly below a liquid crystal panel. One of terminals of the secondary winding W2 is connected to the terminal OT1 through the ballast capacitor C1. The other terminal thereof is connected to the terminal OT2 of the ballast capacitor C2. The connecting point P between the two U-shaped cold-cathode tubes L1 and L2 is ungrounded. Thus, electric currents flowing through the cold-cathode tubes are equal in value to each other.Type: GrantFiled: December 23, 2004Date of Patent: January 9, 2007Assignee: Funai Electric Co., Ltd.Inventors: Kazuo Nishinosono, Hitoshi Miyamoto
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Publication number: 20060095149Abstract: An audio recording device is provided with a first casing, which includes a sound collection means, a second casing, which includes a terminal for connection to an external device. One end portion of the second casing is rotatably joined to a lower end portion of the first casing, such that the second casing can be folded and stored on a rear side of the first casing; the sound collection means is provided at an upper portion of the first casing; and the connection terminal is protrudingly provided on another end portion of the second casing. Furthermore, a recessed portion, into which the connection terminal is fitted, may be formed at a raised portion on the rear side of the first casing, and a front end portion of the connection terminal may be covered by a wall of the recessed portion when the second casing is in a folded and stored state.Type: ApplicationFiled: August 7, 2003Publication date: May 4, 2006Inventors: Yasushi Obata, Hitoshi Miyamoto, Toshihiro Waguri
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Publication number: 20050140312Abstract: A secondary winding W2 of a step-up transformer of a self-excited inverter 2 is grounded at the midpoint thereof. High-frequency voltages differing in polarity from each other are outputted from both terminals OT1 and OT2 of the secondary winding W2. Two U-shaped cold-cathode tubes L1 and L2 series-connected to each other are provided directly below a liquid crystal panel. One of terminals of the secondary winding W2 is connected to the terminal OT1 through the ballast capacitor C1. The other terminal thereof is connected to the terminal OT2 of the ballast capacitor C2. The connecting point P between the two U-shaped cold-cathode tubes L1 and L2 is ungrounded. Thus, electric currents flowing through the cold-cathode tubes are equal in value to each other.Type: ApplicationFiled: December 23, 2004Publication date: June 30, 2005Applicant: Funai Electric Co., Ltd.Inventors: Kazuo Nishinosono, Hitoshi Miyamoto
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Patent number: 6841835Abstract: MOS transistor cells 1 and MOS transistor cells 2 having different gate threshold voltages are formed on a chip 8. The MOS transistor cells 1, 2 having the different gate threshold voltages are connected in parallel.Type: GrantFiled: May 20, 2003Date of Patent: January 11, 2005Assignee: Funai Electric Co., Ltd.Inventor: Hitoshi Miyamoto
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Patent number: 6816393Abstract: There is provided with a breaking resistor R6 inserted at an arbitrary portion of a current path from the output point 21 of a primary side positive power supply IN+ to the drain of an FET 5. Supposing that a value obtained by dividing a resistance value by a rated watt is a broken index, the broken index of the breaking resistor R6 is set to be larger than that of a current detection resistor R1.Type: GrantFiled: April 7, 2003Date of Patent: November 9, 2004Assignee: Funai Electric Co., Ltd.Inventor: Hitoshi Miyamoto
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Publication number: 20040076021Abstract: There is provided with a breaking resistor R6 inserted at an arbitrary portion of a current path from the output point 21 of a primary side positive power supply IN+ to the drain of an FET 5. Supposing that a value obtained by dividing a resistance value by a rated watt is a broken index, the broken index of the breaking resistor R6 is set to be larger than that of a current detection resistor R1.Type: ApplicationFiled: April 7, 2003Publication date: April 22, 2004Inventor: Hitoshi Miyamoto
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Publication number: 20030230766Abstract: MOS transistor cells 1 and MOS transistor cells 2 having different gate threshold voltages are formed on a chip 8. The MOS transistor cells 1, 2 having the different gate threshold voltages are connected in parallel.Type: ApplicationFiled: May 20, 2003Publication date: December 18, 2003Inventor: Hitoshi Miyamoto
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Patent number: 6515944Abstract: A disk playback device including a memory for temporarily storing data from a pickup and outputting the data as delayed by a predetermined period of time, manual keys, and a system control circuit for detecting the playback end of a disk from the playback data from the pickup. The memory has connected thereto an erase circuit for erasing data remaining in the memory. The system control circuit produces different flag values in a first case wherein the control circuit detects the disk end to terminate playback of the disk and in a second case wherein the user manipulates one of the manual keys to terminate the playback. A memory control circuit is connected to the memory and the system control circuit. In the first case, the memory control circuit inputs to the memory playback data of another disk replacing the disk as continued from the data remaining in the memory.Type: GrantFiled: March 1, 1999Date of Patent: February 4, 2003Assignees: Sanyo Electric Co., Ltd., Sanyo Tecnosound Co., Ltd.Inventors: Masanao Yoshida, Yoshimasa Ono, Katsuyuki Matsumoto, Hitoshi Miyamoto