Patents by Inventor Hitoshi Nishio

Hitoshi Nishio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230298921
    Abstract: A ceramic material that has a high resistivity and high corrosion resistance according to the present invention contains magnesium-aluminum oxynitride and has a carbon content of 0.005 to 0.275 mass %.
    Type: Application
    Filed: February 15, 2023
    Publication date: September 21, 2023
    Applicant: NGK Insulators, Ltd.
    Inventors: Akiyoshi HATTORI, Koji UEDA, Hitoshi NISHIO, Tomohisa MIZOGUCHI
  • Patent number: 9788449
    Abstract: A power conversion apparatus 2 has a configuration in which a plate-like bus-bar 80, 80? is disposed vertically so that a width direction thereof is set in a vertical direction, electrically connected to positive electric potential of a battery and fixed to a resin case 50 to include a flat plate-like bus-bar body 81, 82, to which positive electric potential of the battery is applied, and a voltage measuring terminal 82 to 85 branched from the bus-bar body 81, 82. The voltage measuring terminal 82 to 85 includes a projecting portion 83 projecting from the bus-bar body 81, 82, an upright portion 84 extending from the projecting portion 83 upward toward a circuit board 100, and a measuring terminal portion 85 that is an upper part of the upright portion 84 and electrically connected to the circuit board 100.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: October 10, 2017
    Assignee: KEIHIN CORPORATION
    Inventors: Kazuya Nagasawa, Hiroaki Iida, Morifumi Shigemasa, Yasuhiro Maeda, Masami Ogura, Hitoshi Nishio
  • Patent number: 9693476
    Abstract: A power conversion apparatus has a configuration in which plate-like bus-bars are laminated via an insulating material to define a pair of bus-bars. A laminated bus-bar, in which the pair of bus-bars is disposed vertically so that a width direction thereof is in a vertical direction, includes a pair of voltage measuring terminals that is correspondingly branched from a part of the pair of bus-bars to extend toward a circuit board. The pair of voltage measuring terminals is arranged symmetrically with respect to the pair of bus-bars to extend upward toward the circuit board, while extending in an intersecting direction intersecting with the pair of bus-bars, to be electrically connected to the circuit board.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: June 27, 2017
    Assignee: KEIHIN CORPORATION
    Inventors: Kazuya Nagasawa, Hiroaki Iida, Morifumi Shigemasa, Yasuhiro Maeda, Masami Ogura, Hitoshi Nishio
  • Patent number: 9455238
    Abstract: A power converter includes a bus bar, a semiconductor device, a lead, and solder. The bus bar has a vertical wall. The semiconductor device includes an electrode. The lead has one end connected to the bus bar and another end connected to the semiconductor device to supply power from the bus bar to the electrode of the semiconductor device via the lead. The one end of the lead includes a bending part which is spaced away from the bus bar by a predetermined distance and which is inclined in a vertical downward direction. The vertical wall of the bus bar and the bending part are bonded to each other via the solder. The vertical wall extends in a substantially vertical direction to face the bending part.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: September 27, 2016
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Asako Yoneguchi, Toshitake Ohnishi, Yasuhiro Maeda, Hitoshi Nishio, Yoshinobu Suhara, Ryo Imagawa
  • Publication number: 20160081233
    Abstract: A power conversion apparatus 2 has a configuration in which a plate-like bus-bar 80, 80? is disposed vertically so that a width direction thereof is set in a vertical direction, electrically connected to positive electric potential of a battery and fixed to a resin case 50 to include a flat plate-like bus-bar body 81, 82, to which positive electric potential of the battery is applied, and a voltage measuring terminal 82 to 85 branched from the bus-bar body 81, 82. The voltage measuring terminal 82 to 85 includes a projecting portion 83 projecting from the bus-bar body 81, 82, an upright portion 84 extending from the projecting portion 83 upward toward a circuit board 100, and a measuring terminal portion 85 that is an upper part of the upright portion 84 and electrically connected to the circuit board 100.
    Type: Application
    Filed: September 3, 2015
    Publication date: March 17, 2016
    Applicant: KEIHIN CORPORATION
    Inventors: Kazuya Nagasawa, Hiroaki Iida, Morifumi Shigemasa, Yasuhiro Maeda, Masami Ogura, Hitoshi Nishio
  • Publication number: 20160079744
    Abstract: A power conversion apparatus has a configuration in which plate-like bus-bars are laminated via an insulating material to define a pair of bus-bars. A laminated bus-bar, in which the pair of bus-bars is disposed vertically so that a width direction thereof is in a vertical direction, includes a pair of voltage measuring terminals that is correspondingly branched from a part of the pair of bus-bars to extend toward a circuit board. The pair of voltage measuring terminals is arranged symmetrically with respect to the pair of bus-bars to extend upward toward the circuit board, while extending in an intersecting direction intersecting with the pair of bus-bars, to be electrically connected to the circuit board.
    Type: Application
    Filed: August 18, 2015
    Publication date: March 17, 2016
    Applicant: Keihin Corporation
    Inventors: Kazuya Nagasawa, Hiroaki Iida, Morifumi Shigemasa, Yasuhiro Maeda, Masami Ogura, Hitoshi Nishio
  • Publication number: 20140284809
    Abstract: A power converter includes a bus bar, a semiconductor device, a lead, and solder. The bus bar has a vertical wall. The semiconductor device includes an electrode. The lead has one end connected to the bus bar and another end connected to the semiconductor device to supply power from the bus bar to the electrode of the semiconductor device via the lead. The one end of the lead includes a bending part which is spaced away from the bus bar by a predetermined distance and which is inclined in a vertical downward direction. The vertical wall of the bus bar and the bending part are bonded to each other via the solder. The vertical wall extends in a substantially vertical direction to face the bending part.
    Type: Application
    Filed: March 24, 2014
    Publication date: September 25, 2014
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Asako YONEGUCHI, Toshitake OHNISHI, Yasuhiro MAEDA, Hitoshi NISHIO, Yoshinobu SUHARA, Ryo IMAGAWA
  • Patent number: 6500690
    Abstract: A method is provided for producing a thin-film photovoltaic device which has a rear electrode including a transparent conductive rear layer and a light-reflective metallic layer. In forming the light-reflective metallic layer, a first plasma region including fine particles of zinc oxide and a second plasma region including fine particles of silver are formed in a chamber at a sputtering gas pressure of about 0.1 to about 0.27 Pa. Then, the substrate is passed over the first and second plasma regions formed in the chamber to form a bonding layer comprising the zinc oxide and a light-reflective metallic layer comprising the silver, thereby providing the rear electrode having the transparent conductive rear layer, the bonding layer and the light-reflective metallic layer.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: December 31, 2002
    Assignee: Kaneka Corporation
    Inventors: Hideo Yamagishi, Hitoshi Nishio, Takayuki Suzuki
  • Patent number: 6461444
    Abstract: Disclosed is a method of manufacturing a semiconductor device, in which a substrate is successively transferred through a first film-forming chamber for forming a semiconductor layer of a first conductivity type, a second film-forming chamber for forming an i-type semiconductor layer, and a third film-forming chamber for forming a semiconductor layer of a second conductivity type, thereby forming successively a semiconductor layer of a first conductivity type, an i-type semiconductor layer, and a semiconductor layer of a second conductivity type on the substrate. The method comprises the step of simultaneously transferring the substrates arranged within the first, second and third film-forming chambers and each having a semiconductor layer into adjacent chambers on the downstream side.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: October 8, 2002
    Assignee: Kaneka Corporation
    Inventors: Hitoshi Nishio, Hideo Yamagishi, Masataka Kondo
  • Patent number: 6369050
    Abstract: The invention provides an antimicrobial agent capable of producing an excellent effect in the prevention or treatment of bacteria of two or more genera selected from among Streptococcus, Moraxella, Haemophilus, Klebsiella and the like. The agent comprises a penicillin antibiotic, in particular amoxicillin, and a cephem antibiotic, in particular cefixime or cefdinir. The antimicrobial agent of the invention is administered in the form of a mixed preparation containing both or in the form of individual preparations respectively containing them for combined administration.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: April 9, 2002
    Assignee: Fujisawa Pharmaceutical Co., Ltd.
    Inventors: Yoshimi Matsumoto, Shuichi Tawara, Hitoshi Nishio, Takashi Harimoto, Ryoji Sekiyama
  • Patent number: 6315874
    Abstract: A method of depositing a thin film of metal oxide by a magnetron sputtering apparatus with a mobile magnet for creating a magnetic field reciprocating across a film deposition region, is characterized in that the magnet reciprocates no more than twice in depositing a single thin film of metal oxide.
    Type: Grant
    Filed: January 25, 2000
    Date of Patent: November 13, 2001
    Assignee: Kaneka Corporation
    Inventors: Takayuki Suzuki, Hitoshi Nishio
  • Patent number: 6252157
    Abstract: An amorphous silicon-based thin film photovoltaic device having a glass substrate and a laminate structure formed on the glass substrate and consisting of a transparent electrode, a semiconductor layer containing an amorphous silicon-based semiconductor and a back electrode, in which the glass substrate has a transmittance of 88 to 90% for light having a wavelength of 700 nm and 84 to 87% for light having a wavelength of 800 nm.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: June 26, 2001
    Assignee: Kaneka Corporation
    Inventor: Hitoshi Nishio
  • Patent number: 5264710
    Abstract: Amorphous semiconductor thin film is exposed to an atmosphere of hydrogen radical during or after the formation of thin film, or is subject to light irradiation having a density of not less than 10 W/cm.sup.2 at a wavelength of 300 to 700 nm during the formation of the thin film. The obtained thin film has improved, i.e. small, photo deterioration. The semiconductor device using the above thin film is preferably applied to solar cells or thin film transistors.
    Type: Grant
    Filed: April 7, 1992
    Date of Patent: November 23, 1993
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Hideo Yamagishi, Akihiko Hiroe, Hitoshi Nishio, Keiko Miki, Kazunori Tsuge, Yoshihisa Tawada
  • Patent number: 5015838
    Abstract: A color sensor of the present invention is a semiconductor element comprising a semiconductor wherein a plurality of pn or pin junctions are laminated, and conductive layers which are laminated on both surfaces of the semiconductor, characterized in that the semiconductor element is arranged in a way that the quantity of production of photocarriers is increased in order from the light incident side for the whole wave length band to be measured, and that value of current is detected by changing voltage between both conductivity layers. According to the color sensor of the present invention, the construction can be simplified, it is easily integrated and large-scaled, manufacturing process can be simplified, and the yield of color sensors increases, so that there can be realized a color sensor with low cost.
    Type: Grant
    Filed: January 27, 1989
    Date of Patent: May 14, 1991
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Hideo Yamagishi, Akihiko Hiroe, Hitoshi Nishio, Satoru Murakami, Keiko Miki, Minori Yamaguchi, Seishiro Mizukami, Yoshihisa Tawada
  • Patent number: 4965225
    Abstract: An amorphous semiconductor film is prepared by the usual procedure and, then, established by exposing it to sufficient light intermittently to age the same. The degradation of the electrical characteristics of the semiconductor film on prolonged exposure to light is minimized by the above technique. The preferred intermittent light is a pulsed light. The above light treatment may be applied to an individual semiconductor film, a laminated assembly including at least the pin layers, a finished semiconductor device such as a solar cell or a semiconductor device prior to attachment of an electrode.
    Type: Grant
    Filed: September 28, 1989
    Date of Patent: October 23, 1990
    Assignee: Kanegafuchi Chemical Industry Co., Ltd.
    Inventors: Hideo Yamagishi, William A. Nevin, Hitoshi Nishio, Keiko Miki, Kazunori Tsuge, Yoshihisa Tawada