Patents by Inventor Hitoshi Odashima

Hitoshi Odashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7265035
    Abstract: To improve the reliability and yield of a thin-type semiconductor device as used for a stack-type flash memory, the semiconductor device is manufactured by upheaving each of semiconductor chips (semiconductor devices) obtained by dicing a semiconductor wafer on an adhesive sheet from a backside via the adhesive sheet using an upthrow jig to which ultrasonic vibration is applied so as not to break through the adhesive sheet, and by picking up each semiconductor chip.
    Type: Grant
    Filed: March 10, 2003
    Date of Patent: September 4, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Hiroshi Honma, Noriyuki Ooroku, Hitoshi Odashima, Toru Mita, Chuichi Miyazaki, Takashi Wada
  • Publication number: 20070007344
    Abstract: In an RFID (radio frequency identification) tag comprising an antenna formed of a conductive paste containing conductive filler like silver flakes on a base member, and an RFID chip connected to the antenna, the present invention cures a pattern of the antenna formed of the conductive paste, and then connects the RFID chip to the antenna with thermoplastic resin contained in the conductive paste by heating bump electrodes of the RFID chip in contact with the antenna. According to the present invention, Since the bump electrodes of the RFID chip and the antenna are connected to each other and establish sufficient electrical conduction therebetween without providing an anisotropic conductive sheet or the like therebetween, a highly reliable RFID tag is supplied at a low cost.
    Type: Application
    Filed: July 3, 2006
    Publication date: January 11, 2007
    Inventors: Kosuke Inoue, Hiroshi Homma, Hitoshi Odashima, Naoya Kanda, Kie Ueda
  • Publication number: 20060252233
    Abstract: To improve the reliability and yield of a thin-type semiconductor device as used for a stack-type flash memory, the semiconductor device is manufactured by upheaving each of semiconductor chips (semiconductor devices) obtained by dicing a semiconductor wafer on an adhesive sheet from a backside via the adhesive sheet using an upthrow jig to which ultrasonic vibration is applied so as not to break through the adhesive sheet, and by picking up each semiconductor chip.
    Type: Application
    Filed: March 10, 2003
    Publication date: November 9, 2006
    Inventors: Hiroshi Honma, Noriyuki Ooroku, Hitoshi Odashima
  • Publication number: 20040083602
    Abstract: In an apparatus for separating semiconductor chips, a semiconductor wafer stuck to an adhesive sheet with its silicon mirror surface facing downwards is sucked as a whole through its circuit surface side by means of a sucker plate capable of sucking the whole of wafer. In order to separate the sheet from a frame fixing the sheet while the sheet being sucked, the sheet is cut by a cutter edge so as to be separated from the frame. To separate the sheet from the wafer, the wafer top surface is guided by a guide plate having a tip angle of 15° and by causing the sheet to profile the tip of the guide plate, the sheet is peeled off in a direction making an angle of 45° to the dicing direction on the wafer.
    Type: Application
    Filed: June 23, 2003
    Publication date: May 6, 2004
    Inventors: Makoto Matsuoka, Hitoshi Odashima, Kazuyki Futagi, Syoji Nakakuki
  • Patent number: 6629553
    Abstract: A semiconductor device mounting method and system and an IC card fabricating method which can fabricate high quality products by dicing a thin semiconductor wafer, in a state where it is adhered to an adhesive sheet, into thin semiconductor devices, peeling the group of diced thin semiconductor devices from the adhesive sheet at high speed without damaging or cracking the semiconductor devices, conveying the group of peeled semiconductor devices on a unit basis in serial order, and mounting them onto a mounting board.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: October 7, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hitoshi Odashima, Kazuyuki Futagi, Makoto Matsuoka, Toshimitsu Nakagawa
  • Patent number: 6602736
    Abstract: In an apparatus for separating semiconductor chips, a semiconductor wafer stuck to an adhesive sheet with its silicon mirror surface facing downwards is sucked as a whole through its circuit surface side by means of a sucker plate capable of sucking the whole of wafer. In order to separate the sheet from a frame fixing the sheet while the sheet being sucked, the sheet is cut by a cutter edge so as to be separated from the frame. To separate the sheet from the wafer, the wafer top surface is guided by a guide plate having a tip angle of 15° and by causing the sheet to profile the tip of the guide plate, the sheet is peeled off in a direction making an angle of 45° to the dicing direction on the wafer.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: August 5, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Matsuoka, Hitoshi Odashima, Kazuyuki Futagi, Syoji Nakakuki
  • Patent number: 6551449
    Abstract: Electric conductor patterns including antenna coils are formed on one surface of a film. Electronic components are fixed onto the film by a temporary fixing material. A cover film is laminated on the film so that the electrically conductive patterns and the electronic components are covered with the cover film. Simultaneously with the lamination, the electronic components are connected to the electric conductor patterns.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: April 22, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Fujikawa, Yutaka Hashimoto, Isamu Takaoka, Shinichi Kazui, Hideaki Sasaki, Hitoshi Odashima, Mitsugu Shirai
  • Patent number: 6460755
    Abstract: There are disclosed a solder bump forming method and an apparatus therefor, which achieve a high reliability, and an electronic part, produced by this method and this apparatus, is also disclosed. For each of the step of arraying solder balls, the step of supplying a flux, and the step of mounting the solder balls on a board, it is checked whether or not any solder ball is omitted, and the process is conducted while confirming the condition of the operation, thereby enhancing the reliability and also preventing defective products from being produced.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: October 8, 2002
    Assignees: Hitachi, Ltd., Hitachi Seiko Ltd.
    Inventors: Kosuke Inoue, Takamichi Suzuki, Hitoshi Odashima, Katsuhiro Iwashita, Tatsuya Yoneda, Michiharu Honda, Katuhisa Tanaka, Tsuyoshi Yamaguchi, Tetsuo Murakami, Asahi Tsuchiya, Yoshitatsu Naito, Mitsuhiro Suzuki, Izumi Hata, Kouji Sajiki
  • Patent number: 6406357
    Abstract: A surface of a wafer (semiconductor substrate) is subjected to grinding by rotating it and bringing it into contact with a rotating grinding wheel. The grinding wheel is rotated in a first direction at a rotating speed N1. The wafer is rotated in a second direction which is opposite to the first direction at a rotating speed N2, wherein a value of N2/N1 is in the range of 0.006 to 0.025. The wafer is then carried from the grinding process to a dicing process while being maintained in a horizontal position by using a wafer handling jig to prevent the breakage of the wafer. A flash etching process may also be used at the end of the grinding process.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: June 18, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Kazui, Kazuo Shirase, Kenji Morita, Hideaki Sasaki, Hitoshi Odashima
  • Publication number: 20020072202
    Abstract: A semiconductor device mounting method and system and an IC card fabricating method which can fabricate high quality products by dicing a thin semiconductor wafer, in a state where it is adhered to an adhesive sheet, into thin semiconductor devices, peeling the group of diced thin semiconductor devices from the adhesive sheet at high speed without damaging or cracking the semiconductor devices, conveying the group of peeled semiconductor devices on a unit basis in serial order, and mounting them onto a mounting board.
    Type: Application
    Filed: October 30, 2001
    Publication date: June 13, 2002
    Inventors: Hitoshi Odashima, Kazuyuki Futagi, Makoto Matsuoka, Toshimitsu Nakagawa
  • Publication number: 20020046450
    Abstract: A semiconductor device mounting method and system and an IC card fabricating method which can fabricate high quality products by dicing a thin semiconductor wafer, in a state where it is adhered to an adhesive sheet, into thin semiconductor devices, peeling the group of diced thin semiconductor devices from the adhesive sheet at high speed without damaging or cracking the semiconductor devices, conveying the group of peeled semiconductor devices on a unit basis in serial order, and mounting them onto a mounting board.
    Type: Application
    Filed: October 30, 2001
    Publication date: April 25, 2002
    Inventors: Hitoshi Odashima, Kazuyuki Futagi, Makoto Matsuoka, Toshimitsu Nakagawa
  • Publication number: 20020036895
    Abstract: A semiconductor device mounting method and system and an IC card fabricating method which can fabricate high quality products by dicing a thin semiconductor wafer, in a state where it is adhered to an adhesive sheet, into thin semiconductor devices, peeling the group of diced thin semiconductor devices from the adhesive sheet at high speed without damaging or cracking the semiconductor devices, conveying the group of peeled semiconductor devices on a unit basis in serial order, and mounting them onto a mounting board.
    Type: Application
    Filed: October 30, 2001
    Publication date: March 28, 2002
    Inventors: Hitoshi Odashima, Kazuyuki Futagi, Makoto Matsuoka, Toshimitsu Nakagawa
  • Publication number: 20020024883
    Abstract: A semiconductor device mounting method and system and an IC card fabricating method which can fabricate high quality products by dicing a thin semiconductor wafer, in a state where it is adhered to an adhesive sheet, into thin semiconductor devices, peeling the group of diced thin semiconductor devices from the adhesive sheet at high speed without damaging or cracking the semiconductor devices, conveying the group of peeled semiconductor devices on a unit basis in serial order, and mounting them onto a mounting board.
    Type: Application
    Filed: October 29, 2001
    Publication date: February 28, 2002
    Inventors: Hitoshi Odashima, Kazuyuki Futagi, Makoto Matsuoka, Toshimitsu Nakagawa
  • Publication number: 20010050138
    Abstract: Electric conductor patterns including antenna coils are formed on one surface of a film. Electronic components are fixed onto the film by a temporary fixing material. A cover film is laminated on the film so that the electrically conductive patterns and the electronic components are covered with the cover film. Simultaneously with the lamination, the electronic components are connected to the electric conductor patterns.
    Type: Application
    Filed: January 4, 2001
    Publication date: December 13, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Keiji Fujikawa, Yutaka Hashimoto, Isamu Takaoka, Shinichi Kazui, Hideaki Sasaki, Hitoshi Odashima, Mitsugu Shirai
  • Patent number: 6203655
    Abstract: Electric conductor patterns including antenna coils are formed on one surface of a film. Electronic components are fixed onto the film by a temporary fixing material. A cover film is laminated on the film so that the electrically conductive patterns and the electronic components are covered with the cover film. Simultaneously with the lamination, the electronic components are connected to the electric conductor patterns.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: March 20, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Fujikawa, Yutaka Hashimoto, Isamu Takaoka, Shinichi Kazui, Hideaki Sasaki, Hitoshi Odashima, Mitsugu Shirai
  • Patent number: 5279045
    Abstract: The present invention is to define an enclosed space by covering a holder which can hold numerous minute particles, and introduce a fluid into the enclosed space to stir up the numerous minute particles within the enclosed space with a turbulent flow of the fluid so that the minute particles are placed in and held by the holder After stirring up and loading the minute particles in the holder, the fluid is introduced into the enclosed space again to recover the remaining minute particles which have not been held by the holder. The number of minute particles required for one cycle of the loading operation are taken out by moving a particle push-up shaft vertically, having a recess at the distal end thereof, within a stocker which stores a large number of minute particles, and then delivered to the enclosed space with the fluid.
    Type: Grant
    Filed: January 31, 1991
    Date of Patent: January 18, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hitoshi Odashima, Hiroshi Hasegawa, Masayuki Kawaharata, Hideyuki Fukasawa
  • Patent number: 4882833
    Abstract: A coil mounting method and apparatus is disclosed, for example, for mounting coils to the inner periphery of a cylindrical core in assembling a cylindrical rotary transformer of a VTR cylinder. A wire is wound round the outer periphery of a coil holding jig that is capable of opening and closing in a radial direction. After the coil is formed, the coil holding jig is inserted into a cylindrical article and opened radially to have the coil fitted in a coil groove formed in the inner periphery of the cylindrical article. The mounting of the coil to the inner periphery of a cylindrical article can be done in a short time through a reduced number of steps.
    Type: Grant
    Filed: May 13, 1988
    Date of Patent: November 28, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Hiromichi Hiramatsu, Hitoshi Odashima, Kuniaki Hirayama, Toshio Ohji
  • Patent number: 4620663
    Abstract: An apparatus for connecting wiring patterns on a wiring board and leads of a parts to be mounted on the wiring board, via the solder provided between the leads and the patterns. The parts-connecting apparatus enables, especially, circuit elements of a high degree of, to be connected automatically with high reliability and accuracy by using solder through the steps of setting the wiring board in a predetermined position while pressing a surface thereof so as to remove the warp from the wiring board, fastening the leads of the part to the wiring patterns by a magnet provided on the lower surface of the wiring board, and heating the solder provided on the portions of the leads which are fastened to the wiring patterns.
    Type: Grant
    Filed: February 19, 1985
    Date of Patent: November 4, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Hitoshi Odashima, Hideaki Sasaki, Shinichi Kazui, Shigeo Shiono, Osamu Isshiki, Takeshi Kawana