Patents by Inventor Hitoshi Takahaski

Hitoshi Takahaski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4550264
    Abstract: A boosting circuit includes a plurality of variable capacitors with controllable capacitance values in accordance with the voltage level at first and second terminals of each of the variable capicitors A plurality of first buffer circuits is located at the first terminal side, each acting to increase the voltage level at the corresponding first terminal to a first level. A single second buffer circuit located at the second terminal side cooperating commonly with the variable capacitors, to increase the voltage level at each second terminal. The first level is thus boosted to a second level which results in an output of the circuit concerned. Each variable capacitor is fabricated by a MOS transistor capacitor.
    Type: Grant
    Filed: March 30, 1983
    Date of Patent: October 29, 1985
    Assignee: Fujitsu Limited
    Inventors: Hitoshi Takahaski, Satoru Yamaguchi, Hideo Nunokawa