Patents by Inventor Hitoshi Tsuno

Hitoshi Tsuno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11985857
    Abstract: A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. Agate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.
    Type: Grant
    Filed: May 12, 2023
    Date of Patent: May 14, 2024
    Assignee: Sony Group Corporation
    Inventor: Hitoshi Tsuno
  • Publication number: 20240053447
    Abstract: A highly functional photoelectric conversion element is provided.
    Type: Application
    Filed: December 3, 2021
    Publication date: February 15, 2024
    Inventors: Tomohiro OHKUBO, Hitoshi TSUNO, Hideaki TOGASHI, Masayuki KURITA, Syuto TAMURA, Tetsuro TAKADA, Nobuhiro KAWAI, Tomoki HIRAMATSU, Masahiro JOEI, Kenichi MURATA, Hideki TSUJIAI
  • Publication number: 20240032316
    Abstract: Light reduction in a wiring part connected to an optical device of an electronic device including the optical device is prevented. The electronic device includes an insulating layer, an interlayer connection wiring, and an upper layer wiring. The insulating layer is disposed adjacent to the lower layer wiring and includes a through hole. The interlayer connection wiring is a transparent wiring that is connected to the lower layer wiring in the through hole and is formed into a shape extending to a surface side of the insulating layer. The upper layer wiring is a transparent wiring that is stacked and connected to the interlayer connection wiring extending to the surface side of the insulating layer.
    Type: Application
    Filed: December 8, 2021
    Publication date: January 25, 2024
    Inventors: HITOSHI TSUNO, HIDEAKI TOGASHI, TOMOHIRO OHKUBO, MASAYUKI KURITA, SYUTO TAMURA, NOBUHIRO KAWAI, TOMOKI HIRAMATSU, MASAHIRO JOEI, KENICHI MURATA, HIDEKI TSUJIAI, TETSURO TAKADA
  • Publication number: 20230354644
    Abstract: A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. Agate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.
    Type: Application
    Filed: May 12, 2023
    Publication date: November 2, 2023
    Inventor: Hitoshi Tsuno
  • Patent number: 11678519
    Abstract: A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. A gate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: June 13, 2023
    Assignee: Sony Group Corporation
    Inventor: Hitoshi Tsuno
  • Publication number: 20220390783
    Abstract: It is an object of the present disclosure to dispose an optical element on a lower surface side of transistors without being influenced by heat treatment in a transistor forming process such that peeling, displacement, and the like do not easily occur. A transistor array substrate includes: a first substrate (110) including transistors (113) arranged in an array; and a second substrate (120) including an optical element (122), in which the transistors are arranged on a front surface side of the first substrate, and the second substrate is bonded to a back surface of the first substrate by plasma bonding treatment.
    Type: Application
    Filed: October 19, 2020
    Publication date: December 8, 2022
    Inventors: KOICHI AMARI, KOICHI NAGASAWA, HITOSHI TSUNO, YOSHIHIKO KAJIYA, SHINTARO NAKANO, TSUYOSHI OKAZAKI, AKIKO TORIYAMA, YOSHITAKA YAGI, KEIICHI MAEDA, TAKASHI SAKAIRI, TSUTOMU TANAKA
  • Publication number: 20220285471
    Abstract: A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. A gate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a. gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.
    Type: Application
    Filed: February 10, 2022
    Publication date: September 8, 2022
    Inventor: Hitoshi Tsuno
  • Publication number: 20220271066
    Abstract: A transistor array substrate includes a scan line formed on a support substrate, a capacitive section formed above the scan line, and a thin film transistor formed above the capacitive section, in which a perimeter of the thin film transistor is surrounded by a wall-shaped horizontal light-blocking film that extends in a normal direction with respect to the support substrate and is in contact with a surface of an electrode that is an uppermost layer of the capacitive section, and an upper light-blocking film is formed above the thin film transistor.
    Type: Application
    Filed: June 19, 2020
    Publication date: August 25, 2022
    Inventors: TAKEOMI MORITA, SHINYA INAGE, HITOSHI TSUNO, NOBUHIKO ODA, YOSHIHIKO KAJIYA
  • Patent number: 11269207
    Abstract: A liquid crystal display apparatus according to the present disclosure includes a first substrate, a second substrate, and a liquid crystal layer. A pixel electrode and a first orientation film are formed on the first substrate. A common electrode and a second orientation film are formed on the second substrate. The liquid crystal layer is disposed between the first orientation film and the second orientation film. The liquid crystal layer within a display area contains a protrusion that does not contribute to formation of a cell gap. The protrusion is formed by a same inorganic material as for an underlying film. An electronic equipment according to the present disclosure includes the liquid crystal display apparatus having the above-described configuration.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: March 8, 2022
    Assignee: SONY CORPORATION
    Inventor: Hitoshi Tsuno
  • Patent number: 11271060
    Abstract: A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. A gate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: March 8, 2022
    Assignee: Sony Group Corporation
    Inventor: Hitoshi Tsuno
  • Patent number: 11187952
    Abstract: Provided is a liquid crystal display device that includes an effective pixel portion, a pixel drive portion, and a dummy pixel portion adjacent to the effective pixel portion. The effective pixel portion comprises effective pixels contributing to display. The dummy pixel portion includes dummy pixels not contributing to the display. The pixel drive portion drives the effective pixels of the effective pixel portion and the dummy pixels of the dummy pixel portion by reversing a voltage applied to a liquid crystal with a given period with a reference voltage as a center. The effective pixels and the dummy pixels each have a pixel transistor and a retention capacitor. In addition, with respect to retention characteristics of a pixel electric potential in relation to the reference voltage, the retention characteristics of the dummy pixel portion are made asymmetrical relative to the retention characteristics of the effective pixel portion.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: November 30, 2021
    Assignee: SONY CORPORATION
    Inventor: Hitoshi Tsuno
  • Publication number: 20210271126
    Abstract: A liquid crystal display apparatus according to the present disclosure includes a first substrate, a second substrate, and a liquid crystal layer. A pixel electrode and a first orientation film are formed on the first substrate. A common electrode and a second orientation film are formed on the second substrate. The liquid crystal layer is disposed between the first orientation film and the second orientation film. The liquid crystal layer within a display area contains a protrusion that does not contribute to formation of a cell gap. The protrusion is formed by a same inorganic material as for an underlying film. An electronic equipment according to the present disclosure includes the liquid crystal display apparatus having the above-described configuration.
    Type: Application
    Filed: June 12, 2019
    Publication date: September 2, 2021
    Inventor: HITOSHI TSUNO
  • Publication number: 20210210574
    Abstract: A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. A gate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.
    Type: Application
    Filed: October 26, 2020
    Publication date: July 8, 2021
    Inventor: Hitoshi Tsuno
  • Publication number: 20210200007
    Abstract: The present disclosure aims at improving burn-in in a liquid crystal display device. A liquid crystal display device of the present disclosure includes: an effective pixel portion (21) in which effective pixels contributing to display are arranged; a dummy pixel portion (22) which is provided adjacent to the effective pixel portion (21) and in which dummy pixels not contributing to the display are arranged; and a pixel drive portion configured to drive the effective pixels of the effective pixel portion (21) and the dummy pixels of the dummy pixel portion (22) by reversing a voltage applied to a liquid crystal (70) with a given period with a reference voltage as a center. The effective pixels and the dummy pixels each have a pixel transistor (11) and a retention capacitor (13).
    Type: Application
    Filed: March 10, 2017
    Publication date: July 1, 2021
    Inventor: HITOSHI TSUNO
  • Patent number: 10903251
    Abstract: A display device according to the present disclosure includes: a transistor section (100) that includes a gate insulating film (130), a semiconductor layer (140), and a gate electrode layer (120), the semiconductor layer being laminated on the gate insulating film, the gate electrode film being laminated on an opposite side to the semiconductor layer of the gate insulating film; a first capacitor section (200) that includes a first metal film (210) and a second metal film (220), the first metal film being disposed at a same level as wiring layers (161, 162) that are electrically connected to the semiconductor layer and is disposed over the transistor section, the second metal film being disposed over the first metal film with a first interlayer insulating film (152) in between; and a display element that is configured to be controlled by the transistor section.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: January 26, 2021
    Assignee: Sony Corporation
    Inventors: Hitoshi Tsuno, Koichi Nagasawa
  • Patent number: 10840319
    Abstract: A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. A gate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: November 17, 2020
    Assignee: Sony Corporation
    Inventor: Hitoshi Tsuno
  • Publication number: 20200227495
    Abstract: A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. A gate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.
    Type: Application
    Filed: December 13, 2019
    Publication date: July 16, 2020
    Inventor: Hitoshi Tsuno
  • Publication number: 20200127020
    Abstract: A display device according to the present disclosure includes: a transistor section (100) that includes a gate insulating film (130), a semiconductor layer (140), and a gate electrode layer (120), the semiconductor layer being laminated on the gate insulating film, the gate electrode film being laminated on an opposite side to the semiconductor layer of the gate insulating film; a first capacitor section (200) that includes a first metal film (210) and a second metal film (220), the first metal film being disposed at a same level as wiring layers (161, 162) that are electrically connected to the semiconductor layer and is disposed over the transistor section, the second metal film being disposed over the first metal film with a first interlayer insulating film (152) in between; and a display element that is configured to be controlled by the transistor section.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 23, 2020
    Inventors: Hitoshi TSUNO, Koichi NAGASAWA
  • Patent number: 10573700
    Abstract: A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. A gate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: February 25, 2020
    Assignee: Sony Corporation
    Inventor: Hitoshi Tsuno
  • Patent number: 10566356
    Abstract: A display device according to the present disclosure includes: a transistor section (100) that includes a gate insulating film (130), a semiconductor layer (140), and a gate electrode layer (120), the semiconductor layer being laminated on the gate insulating film, the gate electrode film being laminated on an opposite side to the semiconductor layer of the gate insulating film; a first capacitor section (200) that includes a first metal film (210) and a second metal film (220), the first metal film being disposed at a same level as wiring layers (161, 162) that are electrically connected to the semiconductor layer and is disposed over the transistor section, the second metal film being disposed over the first metal film with a first interlayer insulating film (152) in between; and a display element that is configured to be controlled by the transistor section.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: February 18, 2020
    Assignee: Sony Corporation
    Inventors: Hitoshi Tsuno, Koichi Nagasawa