Patents by Inventor Hitoshi YAGISAWA

Hitoshi YAGISAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11743576
    Abstract: A control section 35 compares angles of view of a main captured image generated by a main imaging section 21 and a subordinate captured image generated by a subordinate imaging section 22. In a case where a result of comparison, by the control section 35, of the angles of view indicates that the angle of view of the main captured image is narrower than the angle of view of the subordinate captured image, an image synthesis section 24 generates a display image by superimposing the main captured image on the subordinate captured image or superimposing the reduced subordinate captured image on the main captured image. In a case where the angle of view of the main captured image is narrower than the angle of view of the subordinate image, the main captured image is set as the display image. It is possible to easily decide a composition during shooting by using the subordinate captured image. It is also possible to confirm an imaging status by using the main captured image.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: August 29, 2023
    Assignee: SONY GROUP CORPORATION
    Inventor: Hitoshi Yagisawa
  • Publication number: 20220159192
    Abstract: A control section 35 compares angles of view of a main captured image generated by a main imaging section 21 and a subordinate captured image generated by a subordinate imaging section 22. In a case where a result of comparison, by the control section 35, of the angles of view indicates that the angle of view of the main captured image is narrower than the angle of view of the subordinate captured image, an image synthesis section 24 generates a display image by superimposing the main captured image on the subordinate captured image or superimposing the reduced subordinate captured image on the main captured image. In a case where the angle of view of the main captured image is narrower than the angle of view of the subordinate image, the main captured image is set as the display image. It is possible to easily decide a composition during shooting by using the subordinate captured image. It is also possible to confirm an imaging status by using the main captured image.
    Type: Application
    Filed: January 7, 2020
    Publication date: May 19, 2022
    Inventor: HITOSHI YAGISAWA
  • Patent number: 10175898
    Abstract: A semiconductor device includes a connector connectable to a host, a power supply circuit which includes an input portion that receives first power from the host via the connector, an output portion, and a switch that is connected to the input portion and the output portion and controls whether to supply the first power to the output portion, the power supply circuit generating second power and third power from the first power, a semiconductor memory which receives the second power from the output portion, and a controller which receives the third power from the output portion and controls the semiconductor memory. The power supply circuit turns off the switch and stops supply of power to the semiconductor memory and the controller when the second power exceeds a first value or when the third power exceeds a second value.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: January 8, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hajime Matsumoto, Toyokazu Eguchi, Hitoshi Yagisawa
  • Publication number: 20180285001
    Abstract: A semiconductor device includes a connector connectable to a host, a power supply circuit which includes an input portion that receives first power from the host via the connector, an output portion, and a switch that is connected to the input portion and the output portion and controls whether to supply the first power to the output portion, the power supply circuit generating second power and third power from the first power, a semiconductor memory which receives the second power from the output portion, and a controller which receives the third power from the output portion and controls the semiconductor memory. The power supply circuit turns off the switch and stops supply of power to the semiconductor memory and the controller when the second power exceeds a first value or when the third power exceeds a second value.
    Type: Application
    Filed: June 5, 2018
    Publication date: October 4, 2018
    Inventors: Hajime MATSUMOTO, Toyokazu EGUCHI, Hitoshi YAGISAWA
  • Patent number: 10001936
    Abstract: A semiconductor device includes a connector connectable to a host, a power supply circuit which includes an input portion that receives first power from the host via the connector, an output portion, and a switch that is connected to the input portion and the output portion and controls whether to supply the first power to the output portion, the power supply circuit generating second power and third power from the first power, a semiconductor memory which receives the second power from the output portion, and a controller which receives the third power from the output portion and controls the semiconductor memory. The power supply circuit turns off the switch and stops supply of power to the semiconductor memory and the controller when the second power exceeds a first value or when the third power exceeds a second value.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: June 19, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Hajime Matsumoto, Toyokazu Eguchi, Hitoshi Yagisawa
  • Publication number: 20180046390
    Abstract: A semiconductor device includes a connector connectable to a host, a power supply circuit which includes an input portion that receives first power from the host via the connector, an output portion, and a switch that is connected to the input portion and the output portion and controls whether to supply the first power to the output portion, the power supply circuit generating second power and third power from the first power, a semiconductor memory which receives the second power from the output portion, and a controller which receives the third power from the output portion and controls the semiconductor memory. The power supply circuit turns off the switch and stops supply of power to the semiconductor memory and the controller when the second power exceeds a first value or when the third power exceeds a second value.
    Type: Application
    Filed: February 7, 2017
    Publication date: February 15, 2018
    Inventors: Hajime MATSUMOTO, Toyokazu EGUCHI, Hitoshi YAGISAWA
  • Publication number: 20160093550
    Abstract: An electronic device includes a first electronic unit, a second electronic unit disposed adjacent to the first electronic unit, and a heat radiating unit. The second electronic unit has a first portion and a second portion that is closer to the first electronic unit than the first portion. The heat radiating unit is disposed such that heat generated in the second portion of the second electronic unit is directed towards the first portion of the second electronic unit and from the first portion towards an outside of the electronic device.
    Type: Application
    Filed: March 2, 2015
    Publication date: March 31, 2016
    Inventors: Kengo KUMAGAI, Hitoshi YAGISAWA