Patents by Inventor Hitoshi Yajima

Hitoshi Yajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6034954
    Abstract: For reducing the scale of a multiplexer, a lower speed ATM interface block, an interface block for SDT mode circuit emulation, and an interface block for UDT mode circuit emulation perform processing for terminating services provided by lower speed transmission lines accommodated therein, and part of AAL processing, which is pre-processing depending on a service, for generating ATM cells from signals received by a terminated service, and send the processed signal to a higher speed line interface using a previously assigned time slot on a time-division bus. The higher speed line interface once stores the signals received from the time-division bus in a buffer, and subsequently performs certain processing including a common portion for respective signals for generating therefrom ATM cells in which the signals are stored in payloads. The generated ATM cells are multiplexed and transmitted onto a higher speed transmission line.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: March 7, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Akihiko Takase, Masahiro Takatori, Masaru Murakami, Kaori Nakayama, Hitoshi Yajima, Takaaki Toyama