Patents by Inventor Hitoshi Yamazaki

Hitoshi Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12264457
    Abstract: According to the remote operation system or a remote operation server 20 included in the remote operation system, a “communication resource allocation process” is performed according to the skill or the like of the operator to allocate communication resources to a plurality of remote operation devices 10. When the “environment information control process” is performed, a data amount of environment data is reduced such that a reduction in the information amount of one or a plurality of low environment information factors is greater than the reduction in the information amount of one or a plurality of high environment information factors (meaning the reduction in the information amount of the environment information due to a change in the environment information factor). The environment information control process is performed in different modes according to a difference in an allocation resource.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: April 1, 2025
    Assignee: Kobelco Construction Machinery Co., Ltd.
    Inventors: Yusuke Funahara, Hitoshi Sasaki, Yoichiro Yamazaki
  • Patent number: 12263167
    Abstract: The compound of formula (1a) wherein p is 1 or 2, R1-R4 are hydrogen atom or the like, and a-d are 1 or 2, or a pharmaceutically acceptable salt thereof, which has an antitumor effect by inhibiting the binding between a MLL fusion protein that is infused with AF4, AF9, or the like, which is a representative fusion partner gene causing MLL leukemia, and menin.
    Type: Grant
    Filed: January 12, 2024
    Date of Patent: April 1, 2025
    Assignee: Sumitomo Pharma Co., Ltd.
    Inventors: Seiji Kamioka, Hitoshi Ban, Naoaki Shimada, Wataru Hirose, Akihiko Arakawa, Kazuto Yamazaki, Kenjiro Hira
  • Patent number: 12266392
    Abstract: Provided is a semiconductor device capable of retaining data for a long time. The semiconductor device includes a cell provided with a capacitor, a first transistor, and a second transistor; the capacitor includes a first electrode, a second electrode, and a ferroelectric layer; the ferroelectric layer is provided between the first electrode and the second electrode and polarization reversal occurs by application of a first saturated polarization voltage or a second saturated polarization voltage whose polarity is different from that of the first saturated polarization voltage; and the first electrode, one of a source and a drain of the first transistor, and a gate of the second transistor are electrically connected to one another. In a first period, the first saturated polarization voltage is applied to the ferroelectric layer.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: April 1, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Hitoshi Kunitake
  • Publication number: 20250107062
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first insulator, a second insulator over the first insulator, and a memory cell including a transistor and a capacitor. The transistor includes an oxide over the first insulator, a first conductor and a second conductor over the oxide, a third insulator over the oxide, and a third conductor over the third insulator. The third insulator and the third conductor are located in a first opening of the second insulator. The capacitor includes a fourth conductor in contact with a top surface of the second conductor, a fourth insulator over the fourth conductor, and a fifth conductor over the fourth insulator. The fourth conductor, the fourth insulator, and the fifth conductor are located in a second opening of the second insulator. A third opening is formed in the first insulator, the second insulator, and the first conductor. A sixth conductor is located in the third opening.
    Type: Application
    Filed: January 23, 2023
    Publication date: March 27, 2025
    Inventors: Shunpei YAMAZAKI, Tatsuya ONUKI, Kiyoshi KATO, Hitoshi KUNITAKE, Ryota HODO
  • Publication number: 20250085458
    Abstract: Provided is a film-attached transparent substrate which has excellent light absorption capacity, is neutral both in reflected color and transmitted color, is less likely to produce a color shift depending on the angle of light incidence, and has an insulation property. A film-attached transparent substrate 1 includes: a transparent substrate 2; and an antireflection film 3 provided on one principal surface 2a of the transparent substrate 2, wherein the antireflection film 3 is a multi-layer film including one or more high-refractive index films 5 having a relatively high refractive index and one or more low-refractive index films 4 having a relatively low refractive index, at least one of the one or more low-refractive index films 4 is a light-absorbing film, and the light-absorbing film includes a dielectric phase containing a material having a band gap of not less than 2.0 eV and not more than 2.7 eV and a metallic phase.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 13, 2025
    Inventors: Yusuke YAMAZAKI, Masaaki IMURA, Hitoshi TAKAMURA, Itaru OIKAWA, Akihiro ISHII, Mina YAMAGUCHI
  • Publication number: 20250072009
    Abstract: A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. A first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween are provided in the first conductor. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.
    Type: Application
    Filed: November 14, 2024
    Publication date: February 27, 2025
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Takanori MATSUZAKI, Tatsuya ONUKI, Yuki OKAMOTO, Hideki UOCHI, Satoru OKAMOTO, Hiromichi GODO, Kazuki TSUDA, Hitoshi KUNITAKE
  • Publication number: 20250067706
    Abstract: An object of the disclosure is to provide an electrophoresis system capable of suppressing recurrence of a carry-over as a result of washing of a capillary. The electrophoresis system according to the disclosure is configured to cause the sample stage to reduce the carry-over which is caused by the sample remaining in the washing container after introduction of the sample into a first capillary out of a plurality of capillaries, and influences analysis of the sample using a second capillary out of a plurality of capillaries (see FIG. 5).
    Type: Application
    Filed: January 20, 2022
    Publication date: February 27, 2025
    Inventors: Ayaka OKUNO, Hitoshi MIYATA, Ryusuke KIMURA, Motohiro YAMAZAKI, Shuhei YAMAMOTO, Michiru FUJIOKA
  • Patent number: 12237019
    Abstract: A low-power memory device in which a NAND flash memory and a controller are connected to each other with a short wiring, the controller and a cache memory are connected to each other with a short wiring, and signal transmission delay is small is provided. For example, the NAND flash memory is formed using a Si transistor formed with a single crystal silicon substrate. Since an OS transistor can be formed by a method such as a thin-film method, the cache memory formed using the OS memory can be stacked over the NAND flash memory. When the NAND flash memory and the cache memory are formed in one chip, the NAND flash memory and the controller can be connected to each other with a short wiring, and the controller and the cache memory can be connected to each other with a short wiring.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: February 25, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda, Hitoshi Kunitake
  • Patent number: 12224293
    Abstract: A semiconductor device including: a first insulator in which an opening is formed; a first conductor positioned in the opening; a first oxide over the first insulator; a second oxide over the first oxide; a third oxide and a fourth oxide over the second oxide; a second conductor over the third oxide and the first conductor; a third conductor over the fourth oxide; a fifth oxide over the second oxide; a second insulator over the fifth oxide; and a fourth conductor positioned over the second insulator and overlapping with the fifth oxide. The fifth oxide is in contact with each of a side surface of the third oxide and a side surface of the fourth oxide. The conductivity of the third oxide is higher than the conductivity of the second oxide. The second conductor is in contact with the top surface of the first conductor.
    Type: Grant
    Filed: December 29, 2023
    Date of Patent: February 11, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yuichi Sato, Hitoshi Nakayama
  • Publication number: 20250048676
    Abstract: A semiconductor device that can be miniaturized or highly integrated and a manufacturing method thereof are provided. A semiconductor device includes a metal oxide, a first conductor and a second conductor over the metal oxide, a first insulator positioned over the metal oxide and between the first conductor and the second conductor, a second insulator over the first insulator, a third insulator over the second insulator, a third conductor over the third insulator, a fourth insulator positioned between the first conductor and the first insulator, and a fifth insulator positioned between the second conductor and the first insulator. The first insulator is in contact with the top surface and the side surface of the metal oxide, and oxygen is less likely to pass through the first insulator than the second insulator. The first conductor, the second conductor, the fourth insulator, and the fifth insulator contain the same metal element.
    Type: Application
    Filed: November 17, 2022
    Publication date: February 6, 2025
    Inventors: Ryota HODO, Satoru SAITO, Hitoshi KUNITAKE, Shunpei YAMAZAKI, Masahiro WAKUDA, Toshiki HAMADA
  • Publication number: 20250034034
    Abstract: Provided is a film-covered transparent base plate having an excellent aesthetic appearance even during turn-off of a light source. A film-covered transparent base plate 1includes a transparent base plate 2 and a light-absorbing film 3 provided on one principal surface 2a of the transparent base plate 2 and the light-absorbing film 3 includes a dielectric phase made of a material having a band gap of not less than 2.0 eV and not more than 2.7 eV and a metallic phase.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Inventors: Yusuke YAMAZAKI, Masaaki IMURA, Hitoshi TAKAMURA, Akihiro ISHII, Mina YAMAGUCHI
  • Publication number: 20250040193
    Abstract: A semiconductor device with a high on-state current is provided. A transistor included in the semiconductor device includes a first insulator; a first semiconductor layer over the first insulator; a second semiconductor layer including a channel formation region over the first semiconductor layer; a first conductor and a second conductor over the second semiconductor layer; a second insulator over the second semiconductor layer and between the first conductor and the second conductor; and a third conductor over the second insulator. In a cross-sectional view in a channel width direction of the transistor, the third conductor covers a side surface and a top surface of the second semiconductor layer. The second semiconductor layer has a higher permittivity than the first semiconductor layer.
    Type: Application
    Filed: November 28, 2022
    Publication date: January 30, 2025
    Inventors: Shunpei YAMAZAKI, Hitoshi KUNITAKE, Satoru SAITO, Masahiro TAKAHASHI, Naoki OKUNO, Masashi OOTA
  • Patent number: 12208749
    Abstract: There is provided a camera installation structure for inside of operation room that can obtain a camera image with reduced shake to enable remote operation and hardly obstructs rear visual field in a case where an operator boards a working machine. A camera installation structure 10 includes an operation seat 3, a scaffold member 20 disposed in a rear space 4, and mounting portions for mounting the scaffold member 20. The scaffold member 20 includes a plurality of shelves 21, 23, 25, and 27, a camera 50 installed on the fourth shelf 27, and mounting brackets. In a state where the mounting brackets are mounted on the mounting portions, a lens 51 of the camera 50 is disposed at a height position corresponding to a height of eyes of an operator in a case where the operator sits on the operation seat 3.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: January 28, 2025
    Assignee: Kobelco Construction Machinery Co., Ltd.
    Inventors: Yusuke Sawada, Fumino Hasegawa, Hitoshi Sasaki, Yoichiro Yamazaki
  • Publication number: 20250031415
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first transistor including a first oxide, a second transistor including a second oxide, and a third oxide. The first oxide includes a channel formation region of the first transistor. The second oxide includes a channel formation region of the second transistor. The third oxide contains the same material as the first oxide and the second oxide. The third oxide is separated from the first oxide and the second oxide. In a top view, the third oxide is positioned between the first oxide and the second oxide. The third oxide is placed in the same layer as the first oxide and the second oxide.
    Type: Application
    Filed: November 25, 2022
    Publication date: January 23, 2025
    Inventors: Shunpei YAMAZAKI, Hitoshi KUNITAKE, Ryota HODO, Tatsuya ONUKI
  • Patent number: 11999795
    Abstract: Provided is a monoclonal antibody or a fragment thereof in which heavy-chain complementarity-determining regions (CDRs) 1 to 3 respectively consist of amino acid sequences of SEQ ID NOs: 2 to 4 and light-chain CDRs 1 to 3 respectively consist of amino acid sequences of SEQ ID NOs: 5 to 7; a monoclonal antibody or a fragment thereof in which heavy-chain CDRs 1 to 3 respectively consist of amino acid sequences obtained by deleting, substituting, or adding one or several amino acids in the amino acid sequences of SEQ ID NOs: 2 to 4 and light-chain CDRs 1 to 3 respectively consist of amino acid sequences obtained by deleting, substituting, or adding one or several amino acids in the amino acid sequences of SEQ ID NOs: 5 to 7, and which has binding properties to a KK-LC-1 protein; or a monoclonal antibody or a fragment thereof which competes with the monoclonal antibody or a fragment thereof in which the heavy-chain CDRs 1 to 3 respectively consist of the amino acid sequences of SEQ ID NOs: 2 to 4 and the light-ch
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: June 4, 2024
    Assignee: SCHOOL JURIDICAL PERSON THE KITASATO INSTITUTE
    Inventors: Takashi Fukuyama, Hitoshi Yamazaki, Mariko Ogi, Noritada Kobayashi, Yoshinobu Ichiki, Masahiko Hatakeyama
  • Patent number: 11272152
    Abstract: The orientation and/or position estimation system includes: a movable operating unit configured to be held by a user and having an image capturing section; and a stereoscopic image providing unit including a display portion configured to display a stereoscopic image, a contact portion configured to come into contact with a part of a face of a user who is viewing the stereoscopic image, and a detection subject portion configured to be captured by the image capturing section. A detection subject portion image in the image captured by the image capturing section is detected and the position and the orientation of the movable image capturing unit are estimated on the basis of the detection subject portion image. On the basis of a result of the estimation, the stereoscopic image is generated and displayed.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: March 8, 2022
    Assignee: NINTENDO CO., LTD.
    Inventors: Shotaro Goto, Hideaki Shimizu, Hitoshi Yamazaki, Kenji Iwata
  • Publication number: 20210079110
    Abstract: Provided is a monoclonal antibody or a fragment thereof in which heavy-chain complementarity-determining regions (CDRs) 1 to 3 respectively consist of amino acid sequences of SEQ ID NOs: 2 to 4 and light-chain CDRs 1 to 3 respectively consist of amino acid sequences of SEQ ID NOs: 5 to 7; a monoclonal antibody or a fragment thereof in which heavy-chain CDRs 1 to 3 respectively consist of amino acid sequences obtained by deleting, substituting, or adding one or several amino acids in the amino acid sequences of SEQ ID NOs: 2 to 4 and light-chain CDRs 1 to 3 respectively consist of amino acid sequences obtained by deleting, substituting, or adding one or several amino acids in the amino acid sequences of SEQ ID NOs: 5 to 7, and which has binding properties to a KK-LC-1 protein; or a monoclonal antibody or a fragment thereof which competes with the monoclonal antibody or a fragment thereof in which the heavy-chain CDRs 1 to 3 respectively consist of the amino acid sequences of SEQ ID NOs: 2 to 4 and the light-ch
    Type: Application
    Filed: November 9, 2018
    Publication date: March 18, 2021
    Applicant: School Juridical Person the Kitasato Institute
    Inventors: Takashi FUKUYAMA, Hitoshi YAMAZAKI, Mariko OGI, Noritada KOBAYASHI, Yoshinobu ICHIKI, Masahiko HATAKEYAMA
  • Patent number: 10709971
    Abstract: In a state where an extended input device is secured to a data transmission device, an image capturing unit of the data transmission device captures an image of a light emitting unit that emits light, an image of which is allowed to be captured by the image capturing unit in accordance with a user input and/or a user operation, and data generated based on at least the captured image is transmitted to an information processing apparatus. The information processing apparatus executes an information process based on the transmitted data.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: July 14, 2020
    Assignee: NINTENDO CO., LTD.
    Inventor: Hitoshi Yamazaki
  • Publication number: 20190116350
    Abstract: The orientation and/or position estimation system includes: a movable operating unit configured to be held by a user and having an image capturing section; and a stereoscopic image providing unit including a display portion configured to display a stereoscopic image, a contact portion configured to come into contact with a part of a face of a user who is viewing the stereoscopic image, and a detection subject portion configured to be captured by the image capturing section. A detection subject portion image in the image captured by the image capturing section is detected and the position and the orientation of the movable image capturing unit are estimated on the basis of the detection subject portion image. On the basis of a result of the estimation, the stereoscopic image is generated and displayed.
    Type: Application
    Filed: October 9, 2018
    Publication date: April 18, 2019
    Inventors: Shotaro GOTO, Hideaki SHIMIZU, Hitoshi YAMAZAKI, Kenji IWATA
  • Publication number: 20190091562
    Abstract: In a state where an extended input device is secured to a data transmission device, an image capturing unit of the data transmission device captures an image of a light emitting unit that emits light, an image of which is allowed to be captured by the image capturing unit in accordance with a user input and/or a user operation, and data generated based on at least the captured image is transmitted to an information processing apparatus. The information processing apparatus executes an information process based on the transmitted data.
    Type: Application
    Filed: November 29, 2018
    Publication date: March 28, 2019
    Inventor: Hitoshi YAMAZAKI