Patents by Inventor Hitoshi Yonemura

Hitoshi Yonemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10541390
    Abstract: A flexible power storage unit is obtained. Projections whose ridgelines extend in a first direction are provided on the front and the back of the power storage unit and depressions whose valley lines extend in a second direction are provided on the sides of the power storage unit. The projections and depressions are provided such that the ridgelines of the projections or extended lines of the ridgelines intersect with the valley lines of the depressions or extended lines of the valley lines.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: January 21, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hitoshi Yonemura, Minoru Takahashi
  • Publication number: 20160343999
    Abstract: A flexible power storage unit is obtained. Projections whose ridgelines extend in a first direction are provided on the front and the back of the power storage unit and depressions whose valley lines extend in a second direction are provided on the sides of the power storage unit. The projections and depressions are provided such that the ridgelines of the projections or extended lines of the ridgelines intersect with the valley lines of the depressions or extended lines of the valley lines.
    Type: Application
    Filed: May 13, 2016
    Publication date: November 24, 2016
    Inventors: Hitoshi YONEMURA, Minoru TAKAHASHI
  • Patent number: 6734084
    Abstract: A method for manufacturing a semiconductor device is capable of controlling amounts of protrusion of penetration electrodes (5) from a rear surface of a semiconductor substrate (4) in a easy and accurate manner. Recesses (7) are formed in a substrate proper (6) that has a semiconductor circuit (2) formed on one surface thereof, and an insulation film (8) is formed on an inner wall surface of each of the recesses (7). A conductive material is filled into the recesses (7) through the insulation films (8) to form embedded electrodes (15) that constitute the penetration electrodes (5). A rear side of the substrate proper (6) is re moved until one end face of each of the embedded electrodes (15) is exposed, thereby to form the penetration electrodes (5). The rear surface of the substrate proper (6) is anodized to form an anodic oxide film (9), which is then removed by etching to form the semiconductor substrate (4).
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: May 11, 2004
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Sony Corporation, Fujitsu Limited
    Inventors: Yoshihiko Nemoto, Masataka Hoshino, Hitoshi Yonemura