Patents by Inventor Hitoshi Yoshioka
Hitoshi Yoshioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948864Abstract: A semiconductor device has a first wiring extending in a first direction on a nitride semiconductor layer. A source electrode is electrically connected to the first wiring and extends in a second direction. A drain electrode extends in the second direction and includes a first and second portion extending in the second direction, spaced from each other in the first direction. An element isolation region is in the second nitride semiconductor layer between the first and second portions. A third portion extends in the second direction on the first and second portions. A gate electrode extends in the second direction on the second nitride semiconductor layer between the source electrode and the drain electrode. The portion includes holes therein aligned with each other along the second direction with the spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.Type: GrantFiled: September 2, 2021Date of Patent: April 2, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Toru Sugiyama, Hitoshi Kobayashi
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Publication number: 20240105826Abstract: A semiconductor device of an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first electrode film provided on the first insulating film, a second electrode film provided on the first electrode film, and a first field plate electrode provided on the second electrode film. A lower end of the first field plate electrode is located on a second surface of the first electrode film, the second surface being in contact with the second electrode film, rather than a first surface of the first electrode film, the first surface being in contact with the first insulating film.Type: ApplicationFiled: March 1, 2023Publication date: March 28, 2024Inventors: Hitoshi KOBAYASHI, Masaaki ONOMURA, Toru SUGIYAMA, Akira YOSHIOKA, Hung HUNG, Hideki SEKIGUCHI, Tetsuya OHNO, Yasuhiro ISOBE
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Publication number: 20240105563Abstract: A semiconductor device includes a nitride semiconductor element, a first diode, and a second diode; the nitride semiconductor element includes a conductive mounting bed, a semiconductor substrate formed on the mounting bed, a first nitride semiconductor layer, a second nitride semiconductor layer, a first major electrode, a second major electrode, a first gate electrode, and a second gate electrode; the first diode includes a first anode electrode electrically connected to the mounting bed, and a first cathode electrode electrically connected to the first major electrode; and the second diode includes a second anode electrode electrically connected to the mounting bed, and a second cathode electrode electrically connected to the second major electrode.Type: ApplicationFiled: March 9, 2023Publication date: March 28, 2024Inventors: Toru SUGIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Hideki SEKIGUCHI, Tetsuya OHNO, Masaaki ONOMURA
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Publication number: 20240097671Abstract: A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.Type: ApplicationFiled: February 10, 2023Publication date: March 21, 2024Inventors: Toru SUGIYAMA, Noriaki YOSHIKAWA, Yasuhiko KURIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Tetsuya OHNO, Hideki SEKIGUCHI, Masaaki ONOMURA
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Publication number: 20240088280Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor layer having a heterojunction, a second semiconductor layer on the first semiconductor layer and having another heterojunction, a drain electrode on the second semiconductor layer, a source electrode provided on the first semiconductor layer, a gate electrode provided on the first semiconductor layer between the drain electrode and the source electrode, and a first insulating film between the gate electrode and the drain electrode covering the first semiconductor layer and the second semiconductor layer. The second semiconductor layer being separated from the gate electrode by a portion of the insulating film. A distance from the second semiconductor layer to the gate electrode is shorter than a distance from the drain electrode to the gate electrode.Type: ApplicationFiled: February 28, 2023Publication date: March 14, 2024Inventors: Hung HUNG, Yasuhiro ISOBE, Akira YOSHIOKA, Toru SUGIYAMA, Hitoshi KOBAYASHI
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Patent number: 5856259Abstract: A process for producing a supported catalyst for the synthesis of methacrolein and methacrylic acid in which a catalytic active substance comprising a composite oxide containing molybdenum and bismuth as essential components is supported on the inside surface and/or the outside surface of an inert carrier, which comprises the steps of drying a mixed solution or an aqueous slurry containing the compounds of the elements constituting the catalytic active substance, subjecting the dried product to a primary calcination at a temperature in a range of 200.degree.-400.degree. C. to form a catalytic active substance precursor, comminuting the obtained catalytic active substance precursor to such an extent that the medium particle size in the volume-based particle size distribution becomes 10 .mu.m or less, supporting the comminution product on an inert carrier, and subjecting it to a secondary calcination at a temperature which is 100.degree. C. or more higher than the primary calcination temperature.Type: GrantFiled: June 20, 1997Date of Patent: January 5, 1999Assignee: Mitsubishi Rayon Co., Ltd.Inventors: Seigo Watanabe, Hitoshi Yoshioka, Jinko Izumi
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Patent number: 5701169Abstract: An illumination system includes an optical system for receiving light from a light source, a barrel for accommodating the light source and the optical system therein, the barrel having an inside gas containing a material which may cause blur of an optical element of the optical system, and a transparent protecting member demountably mountable on the barrel, for protecting the optical system against the material.Type: GrantFiled: May 21, 1996Date of Patent: December 23, 1997Assignee: Canon Kabushiki KaishaInventor: Hitoshi Yoshioka
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Patent number: 5288333Abstract: A wafer cleaning method and apparatus in which a cleaning solution is caused to evaporate at a temperature below its boiling point, and cleaning vapor thus produced is applied at a temperature above its dew point to a wafer such as a semiconductor wafer. The wafer is cleaned without formation of colloidal silica in the absence of aerosol, or etched uniformly free of impurities. The wafer cleaning apparatus comprises a cleaning solution storage, a vapor generating section, a wafer supporting position of a wafer supporting device and a vapor supply section. These components are arranged in a housing to overlap one another in plan view and to lie vertically close to one another. The apparatus has a compact overall construction with simplified seals for preventing leakage of the cleaning vapor.Type: GrantFiled: July 29, 1992Date of Patent: February 22, 1994Assignee: Dainippon Screen Mfg. Co., Ltd.Inventors: Masato Tanaka, Hisao Nishizawa, Nobuyuki Hirai, Kaoru Shinbara, Hitoshi Yoshioka
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Patent number: 5171949Abstract: The present invention relates to a switching power supply a microwave oven in which DC power is changed to a pulse form by means of a switching element coupled to a primary winding of an inverter transformer to supply the power to a high frequency oscillator (hereinafter referred to as a magnetron) coupled to a secondary winding. A reference voltage is set lower than an ordinary state from the time of turning on until the oscillation of the magnetron starts. Accordingly, power supplied from the secondary winding of the inverter transformer to the magnetron is set to a low level. The reference voltage increases when oscillation of the magnetron starts, and returns to the ordinary state when the oscillation returns to the ordinary state.Type: GrantFiled: October 31, 1990Date of Patent: December 15, 1992Assignees: Sanyo Electric Co., Ltd., Yutaka Electric Mfg. Co., Ltd.Inventors: Kunihiro Fujishima, Hitoshi Yoshioka
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Patent number: 5158100Abstract: A wafer cleaning method and apparatus in which a cleaning solution is caused to evaporate at a temperature below its boiling point, and cleaning vapor thus produced is applied at a temperature above its dew point to a wafer such as a semiconductor wafer. The wafer is cleaned without formation of colloidal silica in the absence of aerosol, or etched uniformly free of impurities. The wafer cleaning apparatus comprises a cleaning solution storage, a vapor generating section, a wafer supporting position of a wafer supporting device and a vapor supply section. These components are arranged in a housing to overlap one another in plan view and to lie vertically close to one another. The apparatus has a compact overall construction with simplified seals for preventing leakage of the cleaning vapor.Type: GrantFiled: May 4, 1990Date of Patent: October 27, 1992Assignee: Dainippon Screen Mfg. Co., Ltd.Inventors: Masato Tanaka, Hisao Nishizawa, Nobuyuki Hirai, Kaoru Shinbara, Hitoshi Yoshioka
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Patent number: 5111372Abstract: A DC-DC convertor includes a transformer having a primary winding adapted to be connected in series with a DC power source and a secondary winding, a rectifier and smoothing circuit, a main switching device, adapted to be connected in series with the DC power source, for connecting the rectifier and smoothing circuit to the secondary winding of the transformer when the main switching device is in an on-state, an auxiliary switching circuit connected in parallel with the main switching device, and a signal generating circuit for providing a first control signal to the main switching device and a second control signal to the auxiliary switching circuit. The auxiliary switching circuit includes a first capacitor connected in parallel with a second capacitor that is connected in series with an auxiliary switching device.Type: GrantFiled: October 9, 1990Date of Patent: May 5, 1992Assignees: Toko Kabushiki Kaisha, Nemic Lambda Kabushiki Kaisha, Yutaka Electric Mfg. Co., Ltd., Densetsu CorporationInventors: Shigeru Kameyama, Koji Arakawa, Kazushi Watanabe, Hitoshi Yoshioka, Isami Norigoe
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Patent number: 5086381Abstract: A DC-DC converter includes a transformer and a switching element. The primary winding of the transformer and the switching element are connecting in series with a DC power source. A DC output is extracted via a rectifier circuit connected to a secondary winding of the transformer. A capacitor is connected in parallel to the switching element, and a saturable reactor is connected between the secondary winding of the transformer and the rectifier.Type: GrantFiled: October 9, 1990Date of Patent: February 4, 1992Assignees: Toko Kabushiki Kaisha, Nemic Lambda Kabushiki Kaisha, Yutaka Electric Mfg. Co., Ltd., Densetsu Corp.Inventors: Shigeru Kameyama, Koji Arakawa, Kazushi Watanabe, Hitoshi Yoshioka, Isami Norigoe
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Patent number: 5082998Abstract: The present invention relates to a switching power supply for a microwave oven in which a DC power is changed to a pulse by means of a switching element coupled to a primary winding of an inverter transformer to supply the power to a high frequency oscillator (hereinafter referred to as the magnetron) coupled to a secondary winding. The inverter transformer has a supplementary winding which is coupled to control side of the switching element to form a self-excited voltate resonance type. As to the self-excited type, a switching frequency is changed by itself relative to the change of the input voltage and output power for stabilizing the output, thereby realizing same level of operation as a power switching circuit compulsory excited from outside control circuit (hereinafter referred to as The Outside-excited type).Type: GrantFiled: October 31, 1990Date of Patent: January 21, 1992Assignee: Yutaka Electric Mfg. Co., Ltd.Inventor: Hitoshi Yoshioka