Abstract: An LCD controller (10) has a DMA unit (18) and a FIFO memory (20) for storing display data. The LCD controller also has a display data generator (26) that generates display information using a line of the display data stored in the FIFO memory in accordance with a predefined algorithm. A holding register (28) is connected to the display data generator and stores the generated display information. A multiplexer (34) selects for display either the data stored in the FIFO memory or the generated display information. The generated display information is selected when there is a bus overload indicating that the data stored in the FIFO may be erroneous.