Patents by Inventor Ho-Chan Ham

Ho-Chan Ham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10755989
    Abstract: A semiconductor substrate manufacturing method according to an embodiment comprises the steps of: contaminating at least one of a surface layer of a doped semiconductor substrate having a specific resistance of less than 0.1 ?·cm and a bulk layer below the surface layer with at least one metal of Fe, Cu, and Ni; performing dry oxidation at 950° C. for 30 minutes to forcibly form an oxide film on the surface of the semiconductor substrate; and assessing at least one of the presence and the degree of contamination of metal contained in at least one of the oxide film-formed surface layer and bulk layer by using a photoluminescence assessment method.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: August 25, 2020
    Assignee: SK SILTRON CO., LTD.
    Inventors: Kyung Sun Lee, Ho Chan Ham
  • Publication number: 20200066605
    Abstract: A semiconductor substrate manufacturing method according to an embodiment comprises the steps of: contaminating at least one of a surface layer of a doped semiconductor substrate having a specific resistance of less than 0.1 ?·cm and a bulk layer below the surface layer with at least one metal of Fe, Cu, and Ni; performing dry oxidation at 950° C. for 30 minutes to forcibly form an oxide film on the surface of the semiconductor substrate; and assessing at least one of the presence and the degree of contamination of metal contained in at least one of the oxide film-formed surface layer and bulk layer by using a photoluminescence assessment method.
    Type: Application
    Filed: November 28, 2017
    Publication date: February 27, 2020
    Inventors: Kyung Sun LEE, Ho Chan HAM
  • Patent number: 9500694
    Abstract: Provided is a method for evaluating defects in a wafer. The method for evaluating the wafer defects includes preparing a wafer sample, forming an oxidation layer on the wafer sample, measuring a diffusion distance of a minority carrier using a surface photovoltage (SPV), and determining results of a contamination degree.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: November 22, 2016
    Assignee: LG Siltron Inc.
    Inventor: Ho-Chan Ham
  • Publication number: 20140125374
    Abstract: Provided is a method for evaluating defects in a wafer. The method for evaluating the wafer defects includes preparing a wafer sample, forming an oxidation layer on the wafer sample, measuring a diffusion distance of a minority carrier using a surface photovoltage (SPV), and determining results of a contamination degree.
    Type: Application
    Filed: July 3, 2012
    Publication date: May 8, 2014
    Applicant: LG Siltron Inc.
    Inventor: Ho-Chan Ham