Patents by Inventor Ho-Chieh Chuang

Ho-Chieh Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Flash memory allocating method
    Patent number: 8060687
    Abstract: An allocating method for a flash memory is disclosed. The allocating method includes the following steps: adjusting a preliminary data storage capacity corresponding to the flash memory for determining a real data storage capacity of the flash memory; adjusting a preliminary spare area capacity corresponding to the flash memory for determining a real spare area capacity of the flash memory, wherein a total capacity of the preliminary data storage capacity and the preliminary spare area capacity is equal to the total capacity of the real data storage capacity and the real spare area capacity; and allocating the real data storage capacity and the real spare area capacity to the flash memory, wherein the real data storage capacity stores data, and the real spare area capacity stores parity codes generated by an error codes correction algorithm performed upon the stored data in the real data storage capacity.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: November 15, 2011
    Assignee: JMicron Technology Corp.
    Inventors: Kuo-Hua Yuan, Ho-Chieh Chuang, Chao-Nan Chen
  • FLASH MEMORY ALLOCATING METHOD
    Publication number: 20100030945
    Abstract: An allocating method for a flash memory is disclosed. The allocating method includes the following steps: adjusting a preliminary data storage capacity corresponding to the flash memory for determining a real data storage capacity of the flash memory; adjusting a preliminary spare area capacity corresponding to the flash memory for determining a real spare area capacity of the flash memory, wherein a total capacity of the preliminary data storage capacity and the preliminary spare area capacity is equal to the total capacity of the real data storage capacity and the real spare area capacity; and allocating the real data storage capacity and the real spare area capacity to the flash memory, wherein the real data storage capacity stores data, and the real spare area capacity stores parity codes generated by an error codes correction algorithm performed upon the stored data in the real data storage capacity.
    Type: Application
    Filed: September 11, 2008
    Publication date: February 4, 2010
    Inventors: Kuo-Hua Yuan, Ho-Chieh Chuang, Chao-Nan Chen
  • Flash memory circuit with combinational interface
    Publication number: 20090210603
    Abstract: A flash memory circuit has both SATA and USB interfaces. When the flash memory circuit is coupled to a computer, the flash memory circuit utilizes the transmitted power from the computer through the USB interface for operating, and communicates with the computer through the faster SATA interface for data accessing of the flash memory.
    Type: Application
    Filed: May 29, 2008
    Publication date: August 20, 2009
    Inventors: Chao-Nan Chen, Po-Hsiang Wang, Chun-Ming Lu, Ho-Chieh Chuang, Kuo-Hua Yuan