Patents by Inventor Ho-Chieh Yu

Ho-Chieh Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240114614
    Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
  • Publication number: 20230378145
    Abstract: Disclosed is a flip-chip packaged power transistor module having a built-in gate driver, for outputting a high-power signal of at least tens of amperes, the module including at least one power transistor die which has an active side where at least one source pin, at least one drain pin and at least one gate pin are exposed; a ceramic substrate body which has a conducting junction side and a heat spreading side, a minimal spacing of the gate bonding pad from at least one of the source bonding pad or the drain bonding pad being less than 500 ?m, whereby parasitic inductance generated therebetween is reduced; at least one gate driver which has at least one gate pin configured to be soldered to the gate bonding pad, and at least one gate drive pin which corresponds to the gate pin and is configured to be soldered to the drive bonding pad.
    Type: Application
    Filed: May 15, 2023
    Publication date: November 23, 2023
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU
  • Patent number: 11043911
    Abstract: A motor control device with built-in shunt resistor and power transistor is disclosed, comprising a high-thermally conductive substrate; an electrically conductive circuit which is thermo-conductively installed on the high-thermally conductive substrate and includes a first thermal connection pad portion and a second thermal connection pad portion mutually spaced apart; a high power transistor conductively connected to the electrical conducive circuit; and a shunt resistor conductively connected to the high power transistor, respectively including a body whose thermal expansion coefficient is greater than that of the high-thermally conductive substrate, as well as a pair of welding portions extending from the body, in which the body has a prescribed width, and the width of the welding portion is greater than the prescribed width, and the body and the high-thermally conductive substrate are spaced apart such that, upon welding the welding portion to the first thermal connection pad portion and the second therm
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: June 22, 2021
    Assignees: ICP Technology Co., Ltd., Sentec E&E Co., Ltd.
    Inventors: Ho-Chieh Yu, Chen-Cheng-Lung Liao, Chun-Yu Lin, Jason An Cheng Huang
  • Patent number: 10743411
    Abstract: A ceramic substrate component suitable for high-power chips includes a ceramic substrate body and at least one raised metal pad. The ceramic substrate body has an upper surface and a lower surface opposite to the upper surface. The raised metal pad includes a base portion and a top layer. The base portion, which is attached to the upper surface of the ceramic substrate body, has a thickness between 10 and 300 micrometers, and a thermal expansion coefficient greater than the ceramic substrate body. The top layer is formed on the base portion and adapted to install a high-power chip thereon. The top layer extends an area less than the base portion but greater than the high-power chip, and has a thermal expansion coefficient greater than the ceramic substrate body. As such, damages due to thermal stress occurring between the base portion and the ceramic substrate body can be mitigated.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: August 11, 2020
    Assignees: ICP Technology Co., Ltd., Industrial Technology Research Institute
    Inventors: Ho-Chieh Yu, Chen-Cheng-Lung Liao, Chun-Yu Lin, Hsiao-Ming Chang, Jing-Yao Chang, Tao-Chih Chang
  • Publication number: 20200245456
    Abstract: A ceramic substrate component suitable for high-power chips includes a ceramic substrate body and at least one raised metal pad. The ceramic substrate body has an upper surface and a lower surface opposite to the upper surface. The raised metal pad includes a base portion and a top layer. The base portion, which is attached to the upper surface of the ceramic substrate body, has a thickness between 10 and 300 micrometers, and a thermal expansion coefficient greater than the ceramic substrate body. The top layer is formed on the base portion and adapted to install a high-power chip thereon. The top layer extends an area less than the base portion but greater than the high-power chip, and has a thermal expansion coefficient greater than the ceramic substrate body. As such, damages due to thermal stress occurring between the base portion and the ceramic substrate body can be mitigated.
    Type: Application
    Filed: January 8, 2020
    Publication date: July 30, 2020
    Inventors: Ho-Chieh Yu, Chen-Cheng-Lung Liao, Chun-Yu Lin, Hsiao-Ming Chang, Jing-Yao Chang, Tao-Chih Chang
  • Publication number: 20200186067
    Abstract: A motor control device with built-in shunt resistor and power transistor is disclosed, comprising a high-thermally conductive substrate; an electrically conductive circuit which is thermo-conductively installed on the high-thermally conductive substrate and includes a first thermal connection pad portion and a second thermal connection pad portion mutually spaced apart; a high power transistor conductively connected to the electrical conducive circuit; and a shunt resistor conductively connected to the high power transistor, respectively including a body whose thermal expansion coefficient is greater than that of the high-thermally conductive substrate, as well as a pair of welding portions extending from the body, in which the body has a prescribed width, and the width of the welding portion is greater than the prescribed width, and the body and the high-thermally conductive substrate are spaced apart such that, upon welding the welding portion to the first thermal connection pad portion and the second therm
    Type: Application
    Filed: November 22, 2019
    Publication date: June 11, 2020
    Inventors: Ho-Chieh Yu, Chen-Cheng-Lung Liao, Chun-Yu Lin, Jason An Cheng Huang
  • Patent number: 10524349
    Abstract: A printed circuit board with built-in vertical heat dissipation ceramic block, and an electrical assembly are disclosed. The electrical assembly includes the board and a plurality of electronic components. The printed circuit boards includes a dielectric material layer defining at least one through hole, at least one ceramic block corresponding to the through hole, at least one fixing portion for joining the ceramic block to the through hole of the dielectric material layer, a metal circuit layer provided on upper surfaces of the dielectric material layer and the ceramic block, and a high thermal conductivity layer provided on lower surfaces of the dielectric material layer and the ceramic block. The printed circuit board allows the location and size of the ceramic block to be modified according to requirements, so as to implement complicated circuit designs, achieve good effect of thermal conduction, control thermal conduction path, and reduce manufacturing cost.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: December 31, 2019
    Assignees: ICP Technology Co., Ltd., Xiamen Sentecee E&E Co., Ltd.
    Inventors: Ho-Chieh Yu, Cheng-Lung Liao, Chun-Yu Lin, Jason An-Cheng Huang
  • Publication number: 20180352646
    Abstract: A printed circuit board with built-in vertical heat dissipation ceramic block, and an electrical assembly are disclosed. The electrical assembly includes the board and a plurality of electronic components. The printed circuit boards includes a dielectric material layer defining at least one through hole, at least one ceramic block corresponding to the through hole, at least one fixing portion for joining the ceramic block to the through hole of the dielectric material layer, a metal circuit layer provided on upper surfaces of the dielectric material layer and the ceramic block, and a high thermal conductivity layer provided on lower surfaces of the dielectric material layer and the ceramic block. The printed circuit board allows the location and size of the ceramic block to be modified according to requirements, so as to implement complicated circuit designs, achieve good effect of thermal conduction, control thermal conduction path, and reduce manufacturing cost.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 6, 2018
    Inventors: Ho-Chieh Yu, Cheng-Lung Liao, Chun-Yu Lin, Jason An-Cheng Huang
  • Patent number: 8072730
    Abstract: The present invention relates to a chip-type protection device having an enclosed micro-gap between electrodes. The invention includes a substrate on which a pair of discharge electrodes extend towards each other by a micro-gap. A wall is disposed in a manner spaced apart from the micro-gaps by a predetermined distance, on which a cover portion is mounted in a straddling manner across the micro-gaps. The wall and the cover portion are integrated under a predetermined gaseous environment to form a hermectic chamber on which an outer protective layer is coated. End electrodes are subsequently formed on the substrate in a manner connected to conductive portions of the discharge electrodes. The invention provides a protection device against over-voltage.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: December 6, 2011
    Assignee: TA-I Technology Co., Ltd.
    Inventors: Ho-Chieh Yu, Chun-You Lin, Hung-Yi Chuang
  • Patent number: 7733620
    Abstract: Disclosed is a chip scale gas discharge protective device whose metal coupled electrodes are fabricated through processes of yellow light, image formation, and electro casting of metal electrode, and the two electrodes are facing each other in arch lines with the distance of a gap controlled within the range of 0.5˜10 ?m, wherein the entire structure is performed by a bridge process without an extra gas filling procedure in the gap. Due to the fact that the gap is as small as only several ?m, a relevant potential difference existing across there is sufficient to ionize the air thereby suppressing the electro-static discharge (ESD) through the protected electronic device, whereas the fabrication method is disclosed.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: June 8, 2010
    Assignee: TA-I Technology Co., Ltd
    Inventors: Ho-Chieh Yu, Jiun-You Lin, Hung-Yi Chuang, Tsai-Pao Chiang
  • Publication number: 20100020458
    Abstract: The present invention relates to a chip-type protection device having an enclosed micro-gap between electrodes. The invention includes a substrate on which a pair of discharge electrodes extend towards each other by a micro-gap. A wall is disposed in a manner spaced apart from the micro-gaps by a predetermined distance, on which a cover portion is mounted in a straddling manner across the micro-gaps. The wall and the cover portion are integrated under a predetermined gaseous environment to form a hermectic chamber on which an outer protective layer is coated. End electrodes are subsequently formed on the substrate in a manner connected to conductive portions of the discharge electrodes. The invention provides a protection device against over-voltage.
    Type: Application
    Filed: July 22, 2009
    Publication date: January 28, 2010
    Applicant: IA-I TECHNOLOGY CO., LTD
    Inventors: Ho-Chieh Yu, Chun-You Lin, Hung-Yi Chuang
  • Publication number: 20080239610
    Abstract: Disclosed is a chip scale gas discharge protective device whose metal coupled electrodes are fabricated through processes of yellow light, image formation, and electro-casting of metal electrode, and the two electrodes are facing each other in arch lines with the distance of a gap controlled within the range of 0.5˜10 ?m, wherein the entire structure is performed by a bridge process without an extra gas filling procedure in the gap. Due to the fact that the gap is as small as only several ?m, a relevant potential difference existing across there is sufficient to ionize the air thereby suppressing the electro-static discharge (ESD) through the protected electronic device, whereas the fabrication method is disclosed.
    Type: Application
    Filed: March 26, 2007
    Publication date: October 2, 2008
    Inventors: Ho-Chieh Yu, Jiun-You Lin, Hung-Yi Chuang, Tsai-Pao Chiang
  • Publication number: 20050201919
    Abstract: The present invention relates to materials for cathode in solid oxide fuel cells, more particularly, an oxide having high oxygen vacancies and high conductivity as cathode, which is able to accelerate absorption of oxygen molecule and diffusion of oxygen ion for reducing internal resistance of cells, in other words, reducing overpotential of cathode, and improvement of electric generation efficiency of fuel cells. General form of the cathode materials is Ln1-xAxCu1-yByO2.5±?, wherein Ln is lanthanide ion, A is alkaline-earth metal, B is metal. Cathode dope different alkaline-earth metal on A side to converse partly copper (Cu) to trivalence copper ion for forming perovskite having oxygen vacancies with regularity sequence, by utilizing catalytic of cathode electrode accelerating cathode reaction and compound electron being conducted though external circuit with conversing oxygen to form oxygen ion for obtaining anode and hydrogen reaction by diffusing oxygen ion to electrolyte.
    Type: Application
    Filed: March 11, 2004
    Publication date: September 15, 2005
    Inventors: Ho-Chieh Yu, Kuan-Zong Fung