Patents by Inventor Ho Choo

Ho Choo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070251066
    Abstract: A multilayer chip capacitor, and a method for manufacturing the same are Provided. The capacitor comprises a capacitor body having a plurality of dielectric layers stacked therein, a plurality of first and second internal electrodes formed on the dielectric layers, each of the internal electrodes including a main electrode portion and a lead portion, chip-protecting side members formed on both sides of the capacitor body to contact both sides of the first and second internal electrodes, and a pair of external electrodes formed on the outer surface of the capacitor body. The width of the main electrode portion is the same as that of the dielectric layers, and the width of the lead portion is smaller than that of the dielectric layers.
    Type: Application
    Filed: July 3, 2007
    Publication date: November 1, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyoung Kim, Hyo Shin, Ho Choo
  • Publication number: 20070212802
    Abstract: A method of manufacturing an LED package with improved light extraction efficiency. A light-emitting resin part of an LED package is formed and laser beam is irradiated on a surface of the light-transmitting resin part of the LED package to roughen the surface thereof.
    Type: Application
    Filed: February 21, 2007
    Publication date: September 13, 2007
    Inventors: Hai Lee, Jong Lee, Ho Choo, Myung Chang, Youn Park
  • Publication number: 20060271682
    Abstract: A method of operating an Internet protocol (IP) address that effectively allocates, creates, and processes an interface identifier (ID) of an IP address area, and a subnet system using the same are provided. Allocation is done such that in the IP address area including a subnet prefix area and an Interface ID area, certain bits of the Interface ID area are used as an index area of a subnet gateway. In this case, the allocation is implemented in order from the higher layer to the lower layer so that the Interface ID area is sequentially allocated from the higher bits thereof for the index areas of the respective layers. The combination of the certain bits of the allocated Interface ID and the subnet prefix area of the IP address area is used as the subnet ID of the respective subnet layers. The lowest subnet gateway allocates the Interface ID to terminating equipment trying to access to the IP network based on a format of the IP address.
    Type: Application
    Filed: May 26, 2006
    Publication date: November 30, 2006
    Inventors: Ho Choo, Seok Jang
  • Publication number: 20060139848
    Abstract: A multilayer chip capacitor, and a method for manufacturing the same are Provided. The capacitor comprises a capacitor body having a plurality of dielectric layers stacked therein, a plurality of first and second internal electrodes formed on the dielectric layers, each of the internal electrodes including a main electrode portion and a lead portion, chip-protecting side members formed on both sides of the capacitor body to contact both sides of the first and second internal electrodes, and a pair of external electrodes formed on the outer surface of the capacitor body. The width of the main electrode portion is the same as that of the dielectric layers, and the width of the lead portion is smaller than that of the dielectric layers.
    Type: Application
    Filed: November 15, 2005
    Publication date: June 29, 2006
    Inventors: Hyoung Kim, Hyo Shin, Ho Choo
  • Publication number: 20060121258
    Abstract: Disclosed herein is a sol composition for ultrathin dielectric ceramic films, and dielectric ceramic and a multilayered ceramic capacitor manufactured using the same. The sol composition, composed of BaTiO3 as a main ingredient and an auxiliary ingredient, includes a polymeric sol having a metal precursor solution of BaTiO3 and an organic solvent, and an organic additive dissolved in the organic solvent to act as the auxiliary ingredient, in which the amount of the organic additive corresponds to the required amount of the auxiliary ingredient of the dielectric ceramic. Further, the ultrathin dielectric ceramic film, which is manufactured by a sol-gel process, includes the auxiliary ingredient, and hence, is advantageous in making low temperature sintering possible, and having a high dielectric constant, a high sintered density, and TCC characteristic meeting the X5R of EIA standard.
    Type: Application
    Filed: February 9, 2005
    Publication date: June 8, 2006
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yong Kim, Hyo Shin, Hyoung Kim, Ho Choo, Jung Lee
  • Publication number: 20050132548
    Abstract: A method for manufacturing a multilayer ceramic capacitor, in which internal electrodes printed on each of a plurality of dielectric sheets have reduced thicknesses using an absorption member, thereby allowing the multilayer ceramic capacitor to have a high capacity and be minimized. The method includes printing the internal electrodes on each of the dielectric sheets, and stacking the dielectric sheets, wherein the internal electrodes formed on each of the dielectric sheets have a reduced thickness by causing an absorptive member to contact the surface of each of the dielectric sheets provided with the internal electrodes and then separating the absorptive member from the surface so that portions of the internal electrodes having a designated thickness are eliminated, and the dielectric sheets provided with the internal electrodes having the reduced thickness are stacked to form a chip element.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 23, 2005
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ho Choo, Seung Ra, Yong Kim, Jung Lee, Hyo Shin, Hyoung Kim
  • Publication number: 20050128680
    Abstract: Disclosed herein is a method of manufacturing a multilayered ceramic capacitor by a spin coating process, and a multilayered ceramic capacitor obtained by the above method. The method of the current invention provides a plurality of dielectric layers formed by spin coating, in which the process of coating the dielectric layer and the process of printing the inner electrode can be provided as a single process. Therefore, the thickness of the dielectric layer is easily controlled while the dielectric layer is formed to be thin. Further, since the dielectric layers and the inner electrodes are formed successively, the processes of separating and layering the dielectric layers, and the process of compressing the ceramic multilayered body can be omitted. Thereby, the ceramic multilayered body need not be compressed, and thus, a pillowing phenomenon does not occur in the multilayered ceramic capacitor.
    Type: Application
    Filed: December 15, 2004
    Publication date: June 16, 2005
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyo Shin, Seung Ra, Yong Kim, Hyoung Kim, Ho Choo, Jung Lee