Patents by Inventor Ho G. Phan

Ho G. Phan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Enhanced single event upset immune latch circuit
    Patent number: 6275080
    Abstract: An enhanced single event upset immune CMOS latch circuit is formed of a first and a second cross-coupled invertor having isolation transistors in the path coupling the drains of the transistors in the first invertor.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: August 14, 2001
    Assignee: BAE Systems
    Inventors: Ho G. Phan, Derwin L. Jallice, Bin Li