Patents by Inventor Ho-Kyoon Chung

Ho-Kyoon Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010006246
    Abstract: A method of manufacturing semiconductor devices is provided, including the formation of a conductive plug and the minimizing of the step-height of an interlayer dielectric layer. An etching composition is also provided for such a manufacturing method. The method of manufacturing semiconductor devices includes the steps of forming an insulating layer over a semiconductor substrate, forming contact holes in the insulating layer, forming a conductive layer over the insulating layer to burying the contact holes, rotating the semiconductor substrate, and etching the conductive layer by supplying an etching composition on the rotating semiconductor substrate, and spin-etching the tungsten layer using an etching composition such that the conductive layer remains only inside the contact holes and does not remain over the insulating layer.
    Type: Application
    Filed: January 22, 2001
    Publication date: July 5, 2001
    Inventors: Gyu-Hwan Kwag, Se-Jong Ko, Kyung-Seuk Hwang, Jun-Ing Gil, Sang-O Park, Dae-Hoon Kim, Sang-Moon Chon, Ho-Kyoon Chung
  • Patent number: 6232228
    Abstract: A method of manufacturing semiconductor devices is provided, including the formation of a conductive plug and the minimizing of the step-height of an interlayer dielectric layer. An etching composition is also provided for such a manufacturing method. The method of manufacturing semiconductor devices includes the steps of forming an insulating layer over a semiconductor substrate, forming contact holes in the insulating layer, forming a conductive layer over the insulating layer to burying the contact holes, rotating the semiconductor substrate, and etching the conductive layer by supplying an etching composition on the rotating semiconductor substrate, and spin-etching the tungsten layer using an etching composition such that the conductive layer remains only inside the contact holes and does not remain over the insulating layer.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: May 15, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-hwan Kwag, Se-jong Ko, Kyung-seuk Hwang, Jun-ing Gil, Sang-o Park, Dae-hoon Kim, Sang-moon Chon, Ho-Kyoon Chung
  • Patent number: 6140233
    Abstract: A method of manufacturing semiconductor devices is provided for forming a tungsten plug or polysilicon plug and minimizing the step-height of the intermediate insulating layer. An etching composition for this process is also provided as are semiconductor devices manufactured by this process. The method of manufacturing semiconductor devices includes the steps of forming a tungsten film having a certain thickness on an insulating layer and burying contact holes formed in the insulating layer constituting a specific semiconductor structure, and spin-etching the tungsten film using a certain etching composition such that the tungsten film is present only inside the contact holes not existing on the insulating film. The etching composition includes at least one oxidant selected from the group comprising H.sub.2 O.sub.2, O.sub.2, IO.sub.4.sup.-, BrO.sub.3, ClO.sub.3, S.sub.2 O.sub.8.sup.-, KlO.sub.3, H.sub.5 IO.sub.6, KOH, and HNO.sub.3, at least one enhancer selected from the group comprising HF, NH.sub.4 OH, H.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: October 31, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-hwan Kwag, Se-jong Ko, Kyung-seuk Hwang, Jun-ing Gil, Sang-o Park, Dae-hoon Kim, Sang-moon Chon, Ho-Kyoon Chung
  • Patent number: 5944889
    Abstract: With a view to optimizing the donor killing process performed in the semiconductor wafer fabricating process, a heat-treating operation is performed in a thermal furnace above at least 900 .degree. C. for a predetermined time so that growth of the initial oxygen precipitates, induced into the crystal lattices during single-crystal growth, is suppressed.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: August 31, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-guen Park, Gon-sub Lee, Kyoo-chul Cho, Ho-kyoon Chung
  • Patent number: 5846921
    Abstract: Cleaning solutions for application to semiconductor substrates comprise hydrofluoric acid, hydrogen peroxide, isopropyl alcohol, and water. Methods of cleaning semiconductor substrates comprise contacting the semiconductor substrates having contaminants contained thereon with cleaning solutions comprising hydrofluoric acid, hydrogen peroxide, isopropyl alcohol, and water; contacting the semiconductor substrates with first baths of water to remove the cleaning solutions contained on the semiconductor substrates; contacting the semiconductor substrates with second baths containing water to remove the contaminants contained on the semiconductor substrates; and rotating the semiconductor substrates to remove water remaining thereon to clean the semiconductor substrates.
    Type: Grant
    Filed: February 27, 1997
    Date of Patent: December 8, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: June-ing Gil, Seok-ho Yi, Sang-mun Chon, Ho-kyoon Chung