Abstract: A storage device of the present disclosure includes a memory device including a system memory storing system information used in an operation, and a register storing a register value indicating that the system information is a first state or a second state, and a memory controller configured to control the memory device to receive the register value from the memory device when power is turned on, and to initialize the system information stored in the system memory when the received register value indicates that the system information is the first state.

Abstract: A memory controller controls a memory device including a plurality of memory blocks. The memory controller is configured to: control the memory device to store data in a first area among areas of the memory device using a single level cell method, wherein the data are corresponded to a write booster request which is received from a host, perform a wear leveling operation, based on a size of the data stored in the first area, a program-erase count of each of memory blocks of the first area, and a number of free blocks in the memory device and form a mapping relationship between a logical block address, which is received from the host, and a physical block address corresponding the first area.

Abstract: An operation method of a controller for controlling a memory device includes: queuing an identifier of a logical address region associated with a read request from a host in a most recently used (MRU) entry of an internal logical address region queue; increasing a weighted value for a read count of the logical address region by a first value according to whether the identifier of the logical address region has been queued in the logical address region queue before being queued in the MRU entry; adding the weighted value to the read count of the logical address region; providing the host with a map segment corresponding to the logical address region according to a threshold of the read count; and controlling a read operation of the memory device based on a physical address according to whether the read request includes the physical address.

Abstract: An operation method is used for a memory system including at least one memory device and a controller handling an operation in the at least one memory device. The method can include performing a write operation to a first region of the at least one memory device in response to a first write command set, outputting read data through reading the first region programmed in response to the first write command set, reorganizing plural write command data regarding the first write command set, based on the read data, arranging reorganized write command data based on an index of each reorganized write command data, generating estimated read data based on arranged write command data; and comparing the read data with the estimated read data to verify an operation result of the first write command set.

Abstract: A memory controller for controlling a memory device including memory blocks is provided. The memory controller includes: a garbage collection state determiner in communication with a host device and configured to receive a garbage collection state request from the host device and determine whether the memory device is in a state that garbage collection is necessary and a block information storage unit in communication with the garbage collection state determiner and configured to receive, from the memory device, bad block generation information including a number of bad blocks included in the memory device that are unable to store data, and store block information including a total number of the memory blocks, the number of bad blocks, and a number of free blocks included in the memory device that are assigned for garbage collection.

Abstract: A memory controller for controlling a memory device including a plurality of memory blocks includes, the memory controller is configure to: control the memory device to store data in a first area among areas of the memory device using a single level cell method, wherein the data are corresponded to a write booster request which is received from a host, perform a wear leveling operation, based on a size of the data stored in the first area, a program-erase count of each of memory blocks of the first area, and a number of free blocks in the memory device and form a mapping relationship between a logical block address, which is received from the host, and a physical block address corresponding the first area.

Abstract: An operation method of a controller for controlling a memory device includes: queuing an identifier of a logical address region associated with a read request from a host in a most recently used (MRU) entry of an internal logical address region queue; increasing a weighted value for a read count of the logical address region by a first value according to whether the identifier of the logical address region has been queued in the logical address region queue before being queued in the MRU entry; adding the weighted value to the read count of the logical address region; providing the host with a map segment corresponding to the logical address region according to a threshold of the read count; and controlling a read operation of the memory device based on a physical address according to whether the read request includes the physical address.

Abstract: A memory controller for controlling a memory device including memory blocks is provided. The memory controller includes: a garbage collection state determiner in communication with a host device and configured to receive a garbage collection state request from the host device and determine whether the memory device is in a state that garbage collection is necessary and a block information storage unit in communication with the garbage collection state determiner and configured to receive, from the memory device, bad block generation information including a number of bad blocks included in the memory device that are unable to store data, and store block information including a total number of the memory blocks, the number of bad blocks, and a number of free blocks included in the memory device that are assigned for garbage collection.

Abstract: An operation method is used for a memory system including at least one memory device and a controller handling an operation in the at least one memory device. The method can include performing a write operation to a first region of the at least one memory device in response to a first write command set, outputting read data through reading the first region programmed in response to the first write command set, reorganizing plural write command data regarding the first write command set, based on the read data, arranging reorganized write command data based on an index of each reorganized write command data, generating estimated read data based on arranged write command data; and comparing the read data with the estimated read data to verify an operation result of the first write command set.