Patents by Inventor Hoseung JEON

Hoseung JEON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9899216
    Abstract: The present invention provides a semiconductor device manufacturing method for lowering the technical difficulties of a process forming a horizontal single crystal nanowire and a manufacturing cost, the semiconductor device manufacturing method comprising the steps of: preparing a substrate including a first area and a second area; determining a position at which a nanowire is to be formed on the substrate of the first area and arranging an empty space in which the nanowire is to be filled; exposing a substrate surface of a part adjacent to the first area; causing selective single crystal growth from the exposed substrate surface; and forming a nanowire by a self-aligned method through an etching process within the first area, and removing, from outside the first area, a single crystal growth layer of the remaining areas excluding a part necessary for the wiring of the second area.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: February 20, 2018
    Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jeoungwoo Kim, Wangyu Lee, Hoseung Jeon, Junghwan Hyung, Jaehong Park
  • Publication number: 20170301541
    Abstract: The present invention provides a semiconductor device manufacturing method for lowering the technical difficulties of a process forming a horizontal single crystal nanowire and a manufacturing cost, the semiconductor device manufacturing method comprising the steps of: preparing a substrate including a first area and a second area; determining a position at which a nanowire is to be formed on the substrate of the first area and arranging an empty space in which the nanowire is to be filled; exposing a substrate surface of a part adjacent to the first area; causing selective single crystal growth from the exposed substrate surface; and forming a nanowire by a self-aligned method through an etching process within the first area, and removing, from outside the first area, a single crystal growth layer of the remaining areas excluding a part necessary for the wiring of the second area.
    Type: Application
    Filed: October 28, 2014
    Publication date: October 19, 2017
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jeoungwoo KIM, Wangyu LEE, Hoseung JEON, Junghwan HYUNG, Jaehong PARK