Patents by Inventor Ho Shik KANG

Ho Shik KANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9516740
    Abstract: The present invention can reduce warpage while minimizing unnecessary wiring of an electronic component embedded substrate by including an electronic component; a first wiring layer; and a second wiring layer, wherein at least one of the number of layers and wiring density of the first wiring layer is greater than at least one of the number of layers and wiring density of the second wiring layer and a first insulating portion is made of a material having a lower coefficient of thermal expansion than a second insulating portion.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: December 6, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Doo Hwan Lee, Tae Kyun Bae, Ho Shik Kang
  • Patent number: 9307632
    Abstract: A multilayered substrate and a method of manufacturing the same. The multilayered substrate includes a plurality of wiring layers and reinforcing layers disposed at the outermost portions of both surfaces of the multilayered substrate, respectively, in order to decrease warpage of the multilayered substrate and has wiring patterns optimized depending on a scheme in which external electrodes are formed on an electronic component.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: April 5, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Doo Hwan Lee, Ho Shik Kang, Yee Na Shin, Yul Kyo Chung, Seung Eun Lee
  • Publication number: 20150156877
    Abstract: Disclosed herein is a strip level substrate having a plurality of unit level substrate regions partitioned by unit saw lines, including: a plurality of wiring layers and a plurality of insulating layers that are alternately stacked; and warpage preventing members disposed in unit saw line regions of an insulating layer bonded to a carrier member among the plurality of insulating layers, in order to improve warpage characteristics of the strip level substrate.
    Type: Application
    Filed: April 15, 2014
    Publication date: June 4, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ho Shik KANG, Jong Tae PARK, Sang Il EUN
  • Publication number: 20150101846
    Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board according to the present invention may include: a plurality of circuit layers; and a plurality of insulating layers interposed between the plurality of circuit layers, wherein two adjacent insulating layers of the plurality of insulating layers have different thicknesses.
    Type: Application
    Filed: January 21, 2014
    Publication date: April 16, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ho Shik Kang, Jong Tae Park
  • Publication number: 20150101852
    Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board according to a preferred embodiment of the present invention may include: an insulating layer; a first via depressed from one surface of the insulating layer; a second via depressed from the other surface of the insulating layer; and a circuit pattern formed in the insulating layer and bonded to the first and second vias.
    Type: Application
    Filed: September 28, 2014
    Publication date: April 16, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Tae PARK, Ho Shik Kang
  • Publication number: 20150062848
    Abstract: The present invention can reduce warpage while minimizing unnecessary wiring of an electronic component embedded substrate by including an electronic component; a first wiring layer; and a second wiring layer, wherein at least one of the number of layers and wiring density of the first wiring layer is greater than at least one of the number of layers and wiring density of the second wiring layer and a first insulating portion is made of a material having a lower coefficient of thermal expansion than a second insulating portion.
    Type: Application
    Filed: December 17, 2013
    Publication date: March 5, 2015
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Doo Hwan LEE, Tae Kyun BAE, Ho Shik Kang
  • Publication number: 20140182895
    Abstract: A multilayered substrate and a method of manufacturing the same. The multilayered substrate includes a plurality of wiring layers and reinforcing layers disposed at the outermost portions of both surfaces of the multilayered substrate, respectively, in order to decrease warpage of the multilayered substrate and has wiring patterns optimized depending on a scheme in which external electrodes are formed on an electronic component.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Doo Hwan LEE, Ho Shik KANG, Yee Na SHIN, Yul Kyo CHUNG, Seung Eun LEE