Patents by Inventor Ho-Yeol Lee
Ho-Yeol Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11894196Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes stacked in a first direction and having first and second surfaces opposing each other in the first direction, third and fourth surfaces opposing each other in a second direction, and fifth and sixth surfaces opposing each other in a third direction, and first and second external electrodes disposed on the third and fourth surfaces of the body, respectively, and connected to the first and second internal electrodes, respectively. The first and second external electrodes each include a central portion disposed in a center of each of the third and fourth surfaces and an outer portion disposed outside the central portion. T1>T2>T3, in which T1 and T3 are maximum value and minimum value of a thickness of the central portion, respectively, and T2 is a maximum value of a thickness of the outer portion.Type: GrantFiled: June 6, 2022Date of Patent: February 6, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: San Kyeong, Young Soo Yi, Kun Ho Koo, Soung Jin Kim, Ho Yeol Lee, Kyung Ryul Lee, Chang Hak Choi
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Publication number: 20230343514Abstract: A conductive paste includes: conductive powder containing Cu particles; and a glass frit including an oxide containing alkali metal, wherein a content of the alkali metal is 0.16 wt% or more and 0.35 wt% or less with respect to a total content of the Cu particles.Type: ApplicationFiled: December 1, 2022Publication date: October 26, 2023Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Kun Ho KOO, San KYEONG, Soung Jin KIM, Young Soo YI, Ho Yeol LEE, Ic Seob KIM, Kyung Ryul LEE, Chang Hak CHOI
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Publication number: 20230187137Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes stacked in a first direction and having first and second surfaces opposing each other in the first direction, third and fourth surfaces opposing each other in a second direction, and fifth and sixth surfaces opposing each other in a third direction, and first and second external electrodes disposed on the third and fourth surfaces of the body, respectively, and connected to the first and second internal electrodes, respectively. The first and second external electrodes each include a central portion disposed in a center of each of the third and fourth surfaces and an outer portion disposed outside the central portion. T1>T2>T3, in which T1 and T3 are maximum value and minimum value of a thickness of the central portion, respectively, and T2 is a maximum value of a thickness of the outer portion.Type: ApplicationFiled: June 6, 2022Publication date: June 15, 2023Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: San KYEONG, Young Soo YI, Kun Ho KOO, Soung Jin KIM, Ho Yeol LEE, Kyung Ryul LEE, Chang Hak CHOI
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Publication number: 20230178302Abstract: A multilayer capacitor includes a body including a stack structure in which at least one first internal electrode and at least one second internal electrode are alternately stacked in a first direction with at least one dielectric layer interposed therebetween; and first and second external electrodes spaced apart from each other and disposed on the body to be respectively connected to the at least one first internal electrode and the at least one second internal electrode, wherein each of the first and second external electrodes includes a first conductive layer including a first conductive material and glass; and an oxide layer including an oxide and disposed on at least a portion of an external surface of the first conductive layer.Type: ApplicationFiled: April 14, 2022Publication date: June 8, 2023Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Young Soo YI, Kun Ho KOO, San KYEONG, Hai Joon LEE, Kyung Ryul LEE, Ho Yeol LEE
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Publication number: 20140342477Abstract: A method of monitoring a semiconductor fabrication process including forming a barrier pattern on a substrate, forming a sacrificial pattern on the barrier pattern, removing the sacrificial pattern to expose a surface of the barrier pattern, generating photoelectrons by irradiating X-rays to a surface of the substrate, and inferring at least one material existing on the surface of the substrate by collecting and analyzing the photoelectrons may be provided.Type: ApplicationFiled: March 4, 2014Publication date: November 20, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Choon-Shik LEEM, Deok-Yong KIM, Sang-Ho SONG, Chul-Gi SONG, Ho-Yeol LEE, Soo-Bok CHIN
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Patent number: 6909297Abstract: A probe card is provided which includes a plurality of stacked signal printed circuit boards for transmitting signals, and a plurality of ground printed circuit boards respectively interposed between the signal printed circuit boards. To reduce ground noise, each of the ground printed circuit boards includes a plurality of conductive ground regions which are insulated from each other.Type: GrantFiled: January 12, 2004Date of Patent: June 21, 2005Assignee: Samsung Electronics Co., Ltd.Inventors: Joon-Su Ji, In-Seok Hwang, Doo-Seon Lee, Byoung-Joo Kim, Young-Kyo Ro, Ho-Yeol Lee
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Publication number: 20050034743Abstract: An apparatus and method for cleaning debris and residue from a multitude of electrical contacts of a test probe card of an integrated circuit test probe apparatus preferably comprises a silicon wafer having a grooved surface into which the test probe card is moved into pressurized contact. The grooved surface provides a grating structure that when combined with the pressurized electrical contacts will crush any intervening or attached residue particles, which will then break into smaller particles and fall away from the probe card. Pressure and relative movement of the probe card may be controlled by a variety of measurement sensors.Type: ApplicationFiled: September 28, 2004Publication date: February 17, 2005Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Byoung-Joo Kim, In-Seok Hwang, Ho-Yeol Lee, Soo-Min Byun, Hyung-Koo Kim, Joon-Su Ji
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Patent number: 6813804Abstract: An apparatus and method for cleaning debris and residue from a multitude of electrical contacts of a test probe card of an integrated circuit test probe apparatus preferably comprises a silicon wafer having a grooved surface into which the test probe card is moved into pressurized contact. The grooved surface provides a grating structure that when combined with the pressurized electrical contacts will crush any intervening or attached residue particles, which will then break into smaller particles and fall away from the probe card. Pressure and relative movement of the probe card may be controlled by a variety of measurement sensors.Type: GrantFiled: June 6, 2002Date of Patent: November 9, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Byoung-Joo Kim, In-Seok Hwang, Ho-Yeol Lee, Soo-Min Byun, Hyung-Koo Kim, Joon-Su Ji
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Publication number: 20040140824Abstract: A probe card is provided which includes a plurality of stacked signal printed circuit boards for transmitting signals, and a plurality of ground printed circuit boards respectively interposed between the signal printed circuit boards. To reduce ground noise, each of the ground printed circuit boards includes a plurality of conductive ground regions which are insulated from each other.Type: ApplicationFiled: January 12, 2004Publication date: July 22, 2004Inventors: Joon-Su Ji, In-Seok Hwang, Doo-Seon Lee, Byoung-Joo Kim, Young-Kyo Ro, Ho-Yeol Lee
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Publication number: 20030226578Abstract: An apparatus and method for cleaning debris and residue from a multitude of electrical contacts of a test probe card of an integrated circuit test probe apparatus preferably comprises a silicon wafer having a grooved surface into which the test probe card is moved into pressurized contact. The grooved surface provides a grating structure that when combined with the pressurized electrical contacts will crush any intervening or attached residue particles, which will then break into smaller particles and fall away from the probe card. Pressure and relative movement of the probe card may be controlled by a variety of measurement sensors.Type: ApplicationFiled: June 6, 2002Publication date: December 11, 2003Inventors: Byoung-Joo Kim, In-Seok Hwang, Ho-Yeol Lee, Soo-Min Byun, Hyung-Koo Kim, Joon-Su Ji
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Patent number: 6571448Abstract: An apparatus for attaching an object semi-automatically onto a dummy wafer comprising a stage having a loading surface on which the dummy wafer rests, a pressing device for attaching the object gradually onto the dummy wafer placed on the loading surface, and a supporting device for placing the object in a position spaced apart from the loading surface.Type: GrantFiled: August 13, 2001Date of Patent: June 3, 2003Assignee: Samsung Electronics Co., Ltd.Inventors: Ho-Yeol Lee, Sang-Do Lee, In-Seok Hwang, Joon-Su Ji
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Patent number: 6523420Abstract: A tension measurement apparatus for a pogo pin having a height adjusting device for adjusting a height to be measured vertically, on which a device for measuring a tension of the pogo pin is mounted to be vertically movable according to the operation of the height adjusting device. The measurement apparatus preferably includes a vertical moving supporter mounted on the height adjusting device, a fixing member disposed to be coupled with or separated from the vertical moving supporter, a moving rail rotatably connected to the fixing member, a coupler mounted on the moving rail to be movable within the range of a given distance, connected to the tension measurement device. The tension measurement apparatus of the present invention can measure the tension of pogo pins under uniform conditions, while the pogo pins remain in a pogo module, thereby preventing inspection errors due to the pogo pins.Type: GrantFiled: September 12, 2001Date of Patent: February 25, 2003Assignee: Samsung Electronics Co., Ltd.Inventors: Ho-Yeol Lee, Doo-Sun Lee, Byoung-Joo Kim, Jung-Ho Kim
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Publication number: 20020148301Abstract: A tension measurement apparatus for a pogo pin comprising a height adjusting device for adjusting a height to be measured vertically, on which a means for measuring a tension of the pogo pin is mounted to be vertically movable according to the operation of the height adjusting means. The measurement apparatus preferably includes a vertical moving supporter mounted on the height adjusting device, a fixing member disposed to be coupled with or separated from the vertical moving supporter, a moving rail rotatably connected to the fixing member, a coupler mounted on the moving rail to be movable within the range of a given distance, connected to the tension measurement device. The tension measurement apparatus of the present invention can measure the tension of pogo pins under uniform conditions, while the pogo pins remain in a pogo module, thereby preventing inspection errors due to the pogo pins.Type: ApplicationFiled: September 12, 2001Publication date: October 17, 2002Inventors: Ho-Yeol Lee, Doo-Sun Lee, Byoung-Joo Kim, Jung-Ho Kim
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Publication number: 20020144387Abstract: An apparatus for attaching an object semi-automatically onto a dummy wafer comprising a stage having a loading surface on which the dummy wafer rests, a pressing device for attaching the object gradually onto the dummy wafer placed on the loading surface, and a supporting device for placing the object in a position spaced apart from the loading surface.Type: ApplicationFiled: August 13, 2001Publication date: October 10, 2002Inventors: Ho-Yeol Lee, Sang-Do Lee, In-Seok Hwang, Joon-Su Ji