Patents by Inventor Ho-Yi Tsai
Ho-Yi Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7855443Abstract: A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower semiconductor package. Solder balls are implanted to the electrical connection pads and the dummy pads. The upper semiconductor package is mounted on the lower semiconductor package. The upper semiconductor package is electrically connected to the lower semiconductor package by the solder balls implanted to the electrical connection pads, and the encapsulant of the lower semiconductor package is surrounded and confined by the solder balls implanted to the dummy pads. Thereby, the upper semiconductor package is properly and securely positioned on the lower semiconductor package, without the occurrence of misalignment between the upper and lower semiconductor packages.Type: GrantFiled: April 4, 2007Date of Patent: December 21, 2010Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Fang-Lin Tsai, Ho-Yi Tsai, Han-Ping Pu, Cheng-Hsu Hsiao
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Publication number: 20100170709Abstract: An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.Type: ApplicationFiled: March 19, 2010Publication date: July 8, 2010Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Fang-Lin Tsai, Ho-Yi Tsai, Chih-Ming Huang, Chien-Ping Huang
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Patent number: 7696623Abstract: An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.Type: GrantFiled: December 20, 2006Date of Patent: April 13, 2010Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Fang-Lin Tsai, Ho-Yi Tsai, Chih-Ming Huang, Chien-Ping Huang
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Publication number: 20090288866Abstract: An electronic carrier board is provided, including a carrier, at least two paired bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings corresponding in position to the two bond pads. The openings are aligned in the same direction and expose at least a first sidewall and a second sidewall of each of the two bond pads. The first sidewall is perpendicular to an alignment direction of the bond pads and the second sidewall is parallel to the alignment direction of the bond pads. A distance between the first sidewall of at least one of the bond pads and a corresponding side of a corresponding one of the openings is at least about 50 ?m greater than a distance between the second sidewall of the at least one bond pad and a corresponding side of the corresponding opening.Type: ApplicationFiled: August 4, 2009Publication date: November 26, 2009Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Fang-Lin Tsai, Ho-Yi Tsai, Wen-Tsung Tseng, Chih-Ming Huang
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Patent number: 7608915Abstract: A heat dissipation semiconductor package includes a chip carrier, a semiconductor chip, a heat conductive adhesive, a heat dissipation member, and an encapsulant. The semiconductor chip is flip-chip mounted on the chip carrier and defined with a heat conductive adhesive mounting area. Periphery of the heat adhesive mounting area is spaced apart from edge of the semiconductor chip. The heat dissipation member is mounted on the heat conductive adhesive formed in the heat conductive adhesive mounting area. The encapsulant formed between the chip carrier and the heat dissipation member encapsulates the semiconductor chip and the heat conductive adhesive, and embeds edges of the active surface and non-active surface and side edge of the semiconductor chip, thereby increasing bonding area between the encapsulant and the semiconductor chip. The side edges of the heat conductive adhesive and the semiconductor chip are not flush with each other, thereby preventing propagation of delamination.Type: GrantFiled: May 8, 2008Date of Patent: October 27, 2009Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chun-Ming Liao, Chien-Ping Huang, Ho-Yi Tsai, Cheng-Hsu Hsiao
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Patent number: 7573722Abstract: An electronic carrier board is provided, including a carrier, at least two paired bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings corresponding in position to the two bond pads. The openings are aligned in the same direction and expose at least a first sidewall and a fourth sidewall of each of the two bond pads. The first sidewall and the fourth sidewall are both perpendicular to an alignment direction of the bond pads. A distance between the first sidewall of at least one of the bond pads and a corresponding side of a corresponding one of the openings is at least about 50 ?m greater than a distance between the fourth sidewall of the at least one bond pad and a corresponding side of the corresponding opening.Type: GrantFiled: January 16, 2007Date of Patent: August 11, 2009Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Fang-Lin Tsai, Ho-Yi Tsai, Wen-Tsung Tseng, Chih-Ming Huang
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Publication number: 20090096115Abstract: A semiconductor package and a method for fabricating the same are disclosed. The present invention discloses mounting and electrically connecting a semiconductor chip to a chip carrier, forming an interfacial layer or a heat-dissipating member having the interfacial layer on the semiconductor chip, and forming an encapsulant for covering the semiconductor chip, the interfacial layer or the heat dissipating member. The method further includes cutting the encapsulant along edges of the interfacial layer, and removing the redundant encapsulant on the interfacial layer so as to expose the semiconductor chip or the heat-dissipating member without forming burr or heavily wearing cutting tools.Type: ApplicationFiled: June 12, 2007Publication date: April 16, 2009Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Chien-Ping Huang, Han-Ping Pu, Ho-Yi Tsai
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Publication number: 20080308926Abstract: A heat dissipation package structure and method for fabricating the same are disclosed, which includes mounting and electrically connecting a semiconductor chip to a chip carrier through its active surface; mounting a heat dissipation member having a heat dissipation section and a supporting section on the chip carrier such that the semiconductor chip can be received in the space formed by the heat dissipation section and the supporting section, wherein the heat dissipation section has an opening formed corresponding to the semiconductor chip; forming an encapsulant to encapsulate the semiconductor chip and the heat dissipation member; and thinning the encapsulant to remove the encapsulant formed on the semiconductor chip to expose inactive surface of the semiconductor chip and the top surface of the heat dissipation section from the encapsulant.Type: ApplicationFiled: June 13, 2008Publication date: December 18, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Min-Shun Hung, Ho-Yi Tsai, Chien-Ping Huang, Cheng-Hsu Hsiao
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Publication number: 20080283994Abstract: A stacked package structure and fabrication method thereof are disclosed, including providing a substrate having a plurality of stackable solder pads formed on surface thereof for allowing at least one semiconductor chip to be electrically connected to the substrate; forming an encapsulant for encapsulating the semiconductor chip and further exposing the stackable solder pads from the encapsulant, thus forming a lower-layer semiconductor package; forming conductive bumps on at least one stackable solder pad by means of wire bonding such that at least one upper-layer semiconductor package can be mounted via solder balls on the conductive bumps and the stackable solder pads of the lower-layer semiconductor package to form a stacked package structure, wherein, stacking height of the solder balls and the conductive bumps is greater than height of the encapsulant of the lower-layer semiconductor package, thus, when stacking fine pitch semiconductor packages or when warps occur to the upper-layer semiconductor packType: ApplicationFiled: May 16, 2008Publication date: November 20, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Ho-Yi Tsai, Chien-Ping Huang, Jung-Pin Huang, Chin-Huang Chang, Cheng-Hsu Hsiao
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Publication number: 20080277777Abstract: A heat dissipation semiconductor package includes a chip carrier, a semiconductor chip, a heat conductive adhesive, a heat dissipation member, and an encapsulant. The semiconductor chip is flip-chip mounted on the chip carrier and defined with a heat conductive adhesive mounting area. Periphery of the heat adhesive mounting area is spaced apart from edge of the semiconductor chip. The heat dissipation member is mounted on the heat conductive adhesive formed in the heat conductive adhesive mounting area. The encapsulant formed between the chip carrier and the heat dissipation member encapsulates the semiconductor chip and the heat conductive adhesive, and embeds edges of the active surface and non-active surface and side edge of the semiconductor chip, thereby increasing bonding area between the encapsulant and the semiconductor chip. The side edges of the heat conductive adhesive and the semiconductor chip are not flush with each other, thereby preventing propagation of delamination.Type: ApplicationFiled: May 8, 2008Publication date: November 13, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Chun-Ming Liao, Chien-Ping Huang, Ho-Yi Tsai, Cheng-Hsu Hsiao
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Publication number: 20080258294Abstract: A heat-dissipating semiconductor package structure and a method for manufacturing the same is disclosed. The method includes: disposing on and electrically connecting to a chip carrier at least a semiconductor chip and a package unit; disposing on the top surface of the package unit a heat-dissipating element having a flat portion and a supporting portion via the flat portion; receiving the package unit and semiconductor chip in a receiving space formed by the flat portion and supporting portion of the heat-dissipating element; and forming on the chip carrier encapsulant for encapsulating the package unit, semiconductor chip, and heat-dissipating element. The heat-dissipating element dissipates heat generated by the package unit, provides EMI shielding, prevents delamination between the package unit and the encapsulant, decreases thermal resistance, and prevents cracking.Type: ApplicationFiled: April 23, 2008Publication date: October 23, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Wen-Tsung Tseng, Ho-Yi Tsai, Chien-Ping Huang, Cheng-Hsu Hsiao
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Publication number: 20080251910Abstract: A method for fabricating semiconductor packages is disclosed, including mounting and electrically connecting a semiconductor chip onto a chip carrier; mounting a heat-dissipating structure on the semiconductor chip; placing the heat-dissipating structure into a mold cavity for filling therein a packaging material to form an encapsulant, wherein the heat-dissipating structure has a heat spreader having a size larger than that of the predetermined size of the semiconductor package, a covering layer formed on the, and a plurality of protrusions formed on edges of the covering layer that are free from being corresponding in position to the semiconductor chip, such that the protrusions can abut against a top surface of the mold cavity to prevent the heat spreader from being warped; and finally performing a singulation process according to the predetermined size and removing the encapsulant formed on the covering layer to form the desired semiconductor package.Type: ApplicationFiled: April 11, 2008Publication date: October 16, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Chih-Wei Chang, Ho-Yi Tsai, Chien-Ping Huang, Chun-Ming Liao, Cheng-Hsu Hsiao
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Publication number: 20080213942Abstract: This invention provides a method for fabricating a semiconductor device and a carrier applied therein. The method includes the steps of: disposing a chip-mounted substrate in an opening of a carrier; forming at least a storage aperture and at least an inspection aperture in the carrier; infusing an adhesive into the storage aperture to fill a gap between the substrate and carrier with the adhesive by capillarity; determining whether the inspection aperture is filled with the adhesive to ascertain whether the gap is completely filled with the adhesive; in response to a positive result, performing a molding process to form a molding compound for encapsulating the chip; and performing implantation of solder ball and a singulation process to form a semiconductor device with desirable dimensions.Type: ApplicationFiled: March 3, 2008Publication date: September 4, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Min-Shun Hung, Ho-Yi Tsai, Chien-Ping Huang, Wen-Tsung Tseng, Cheng-Hsu Hsiao
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Publication number: 20080157346Abstract: A method for fabricating a heat-dissipating package and a heat-dissipating structure applicable thereto are disclosed. The method includes: mounting and electrically connecting to a chip carrier a semiconductor chip mounted with a heat-dissipating structure; disposing on the heat-dissipating structure a covering layer protrudingly formed with an abutting portion surrounding the covering layer, wherein the size of the heat-dissipating structure is greater than the predetermined one of the package to position the chip carrier in a cavity of a mold and encapsulate the heat-dissipating structure and semiconductor chip by encapsulant, and the protruding portion abuts against a top surface of the cavity and prevent the heat-dissipating structure from warping; and singulating the package and removing the encapsulant from the covering layer thereunder according to the predetermined size of the package.Type: ApplicationFiled: April 26, 2007Publication date: July 3, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Min-Shun Hung, Ho-Yi Tsai, Chien-Ping Huang, Chun-Ming Liao, Cheng-Hsu Hsiao
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Publication number: 20080122071Abstract: A heat dissipating semiconductor package and the fabrication method therefor are provided. The fabrication method for the heat dissipating semiconductor package mainly includes steps of: containing a substrate having a chip mounted thereon in an aperture of a carrier, wherein the carrier has an electroconductive layer; allowing a heat dissipating structure having supporting portions to be mounted on and electrically connected to the electroconductive layer of the carrier via the supporting portions thereof while heat dissipating structure being mounted on the chip; after an encapsulation process and removing a part of the encapsulant above the heat dissipating sheet by lapping to expose a surface of the heat dissipating structure from the encapsulant, depositing and forming a metal passivation layer on the surface of the heat dissipating structure by electroplating for preventing the heat dissipating structure from oxidizing.Type: ApplicationFiled: November 21, 2007Publication date: May 29, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Wen-Tsung Tseng, Ho-Yi Tsai, Chien-Ping Huang, Chih-Wei Chang, Cheng-Hsu Hsiao
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Publication number: 20080122070Abstract: A heat dissipating semiconductor package and a fabrication method therefor are provided. The fabrication method for the heat dissipating semiconductor package mainly includes steps of: containing a substrate having a chip mounted thereon in an aperture of a carrier; mounting a heat dissipating sheet having supporting portions on the carrier with the heat dissipating sheet being attached on the chip; forming an encapsulant to encapsulate the semiconductor chip and the heat dissipating structure; removing a part of the encapsulant above the heat dissipating sheet with a part of the heat dissipating sheet exposed from the encapsulant by lapping; and forming a cover layer on the part of heat dissipating sheet to prevent it from oxidation; and cutting along a predetermined size of the semiconductor package, thereby heat generated from an operation of the chip is dissipated via the heat dissipating structure.Type: ApplicationFiled: November 21, 2007Publication date: May 29, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Wen-Tsung Tseng, Ho-Yi Tsai, Chien-Ping Huang, Chih-Wei Chang, Cheng-Hsu Hsiao
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Patent number: 7371617Abstract: A semiconductor package with a heat sink and a method for fabricating the same are proposed. The heat sink is provided with a rigid and thermally resistant detach member on a top surface thereof, and is attached via its bottom surface to a chip mounted on a chip carrier. The detach member is sized larger than the heat sink and can be easily removed from the top surface of the heat sink. Subsequently, a molding process is performed to form an encapsulant for completely encapsulating the chip, the heat sink and the detach member. Then, a singulation process is performed to cut along predetermined cutting lines located between sides of the heat sink and corresponding sides of the detach member. Finally, the detach member and a portion of the encapsulant formed on the detach member are removed from the heat sink. The above fabrication method reduces the packaging cost.Type: GrantFiled: October 12, 2006Date of Patent: May 13, 2008Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Ho-Yi Tsai, Chien-Ping Huang
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Patent number: 7348211Abstract: A method for fabricating semiconductor packages is proposed. A plurality of substrates each having a chip thereon are prepared. Each substrate has similar length and width to the predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. Each opening is larger in length and width than the substrate. The substrates are positioned in the corresponding openings, and gaps between the substrates and the carrier are sealed. A molding process is performed to form an encapsulant over each opening to encapsulate the chip. An area on the carrier covered by the encapsulant is larger in length and width than the opening. After performing a mold-releasing process, a plurality of the semiconductor packages are formed by a singulation process to cut along substantially edges of each substrate according to the predetermined size of the semiconductor package. A waste of substrate material is avoided.Type: GrantFiled: April 27, 2005Date of Patent: March 25, 2008Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Ying-Ren Lin, Ho-Yi Tsai, Chien-Ping Huang, Cheng-Hsu Hsiao
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Publication number: 20080061451Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.Type: ApplicationFiled: September 10, 2007Publication date: March 13, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Wen-Home Huang, Wen-Tsung Tseng, Chang-Fu Lin, Ho-Yi Tsai, Cheng-Hsu Hsiao
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Publication number: 20080017977Abstract: A heat dissipating semiconductor package and a heat dissipating structure thereof are provided. The heat dissipating structure includes an outer surface, consecutive recessed step portions, and a pressure-releasing groove. The outer surface is exposed from an encapsulant made of a molding compound. The step portions are formed at an edge of the outer surface and have decreasing depths wherein the closer a step portion to a central position of the outer surface, the smaller the depth of this step portion is. The pressure-releasing groove is disposed next to and deeper than the innermost one of the step portions. A molding compound flows to the step portions and absorbs heat from an encapsulation mold quickly, such that a flowing speed of the molding compound is reduced. Pressure suffered by air remaining at the step portions is released through the pressure-releasing groove, thereby preventing flashes of the molding compound and resin bleeding.Type: ApplicationFiled: May 10, 2007Publication date: January 24, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Wen-Tsung Tseng, Chien-Ping Huang, Ho-Yi Tsai, Cheng-Hsu Hsiao