Patents by Inventor Hoa Kieu
Hoa Kieu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050136691Abstract: A method of depositing a dielectric film, such as tantalum oxide, on a substrate is described. In one example, a substrate is placed in a process zone to face a metal target and a pulsed DC voltage is applied to the target. A sputtering gas comprising a non-reactive component and an oxygen-containing component is introduced to the process zone in a volumetric flow ratio selected to achieve the desired x and y values in the deposited dielectric film, for example, in the deposition of a non-stoichiometric TaxOy film or in the deposition of a tantalum oxide film in which the oxidation state of tantalum is less than +5. The sputtering gas is removed from the process zone by condensing at least some of the non-reactive component on a cooled surface external to the process zone, and exhausting at least some of the oxygen-containing component from the process zone with moving rotors. A multiple layer dielectric film having different stoichiometric ratios in the layers can also be deposited by the instant method.Type: ApplicationFiled: May 28, 2004Publication date: June 23, 2005Inventors: Hien-Minh Le, Hoa Kieu
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Patent number: 6312568Abstract: The present invention provides a method of forming an aluminum nitride layer on a substrate in a processing chamber comprising depositing a first aluminum nitride layer at a first chamber pressure on a substrate, and then depositing a second aluminum nitride layer at a second chamber pressure higher than the first chamber pressure on the aluminum nitride nucleating layer. The first aluminum nitride layer is deposited by sputtering an aluminum target in a nitrogen and inert gas plasma in a processing chamber at a chamber pressure of about 1.5 to about 3 milliTorr. The second aluminum nitride layer is deposited by sputtering an aluminum target in a nitrogen and inert gas plasma at a chamber pressure of about 5 to about 10 milliTorr. The process may be carried out in the same physical vapor deposition chamber with the substrate being maintained at a temperature of preferably between about 125° C. and about 500° C.Type: GrantFiled: December 7, 1999Date of Patent: November 6, 2001Assignee: Applied Materials, Inc.Inventors: Ingo Wilke, Rochelle King, Hoa Kieu
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Publication number: 20010008205Abstract: The present invention provides a method of forming an aluminum nitride layer on a substrate in a processing chamber comprising depositing a first aluminum nitride layer at a first chamber pressure on a substrate, and then depositing a second aluminum nitride layer at a second chamber pressure higher than the first chamber pressure on the aluminum nitride nucleating layer. The first aluminum nitride layer is deposited by sputtering an aluminum target in a nitrogen and inert gas plasma in a processing chamber at a chamber pressure of about 1.5 to about 3 milliTorr. The second aluminum nitride layer is deposited by sputtering an aluminum target in a nitrogen and inert gas plasma at a chamber pressure of about 5 to about 10 milliTorr. The process may carried out in the same physical vapor deposition chamber with the substrate being maintained at a temperature of preferably between about 125° C. and about 500° C.Type: ApplicationFiled: December 7, 1999Publication date: July 19, 2001Applicant: APPLIED MATERIALS, INC.Inventors: INGO WILKE, ROCHELLE KING, HOA KIEU
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Patent number: 6232665Abstract: A process for fabricating metal plugs, such as aluminum plugs, in a semiconductor workpiece. The invention is suitable for filling narrow, high aspect ratio holes, and the invention minimizes the formation of TiAl3 or other products of interdiffusion between the plug and the wetting layer. First, an optional barrier layer is created by covering the bottom of a hole with a film containing titanium nitride doped with silicon. Second, a wetting layer is created by covering the side walls of a hole with a film containing titanium doped with silicon, in a Ti:Si molar ratio greater than 1:2. Preferably, the wetting layer is created by sputter deposition using a titanium sputtering target containing 0.1% to 20% wt silicon, most preferably 5% to 10% wt silicon. Third, the hole is filled by depositing a material consisting primarily of aluminum. The hole preferably is filled by sputter deposition using an aluminum sputtering target, optionally containing dopants such as copper.Type: GrantFiled: June 8, 1999Date of Patent: May 15, 2001Assignee: Applied Materials, Inc.Inventors: Gongda Yao, Peijun Ding, Zheng Xu, Hoa Kieu
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Patent number: 6033541Abstract: A method and apparatus for depositing material to conformally cover or fill holes within the surface of a semiconductor substrate. The preferred method includes the steps of coherently depositing a first thickness of the material onto the surface of the substrate; reverse sputtering the deposited material so as to coat the sidewalls of the contact holes with the deposited material; after the first thickness of the material is deposited onto the surface of the substrate, depositing a second thickness of the material onto the surface of the substrate; and while depositing the second thickness of the material onto the surface of the substrate, heating the substrate to enhance reflow of the material being deposited.Type: GrantFiled: January 28, 1998Date of Patent: March 7, 2000Assignee: Applied Materials, Inc.Inventors: Zheng Xu, Hoa Kieu
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Patent number: 5911113Abstract: A process for fabricating metal plugs, such as aluminum plugs, in a semiconductor workpiece. The invention is suitable for filling narrow, high aspect ratio holes, and the invention minimizes the formation of TiAl3 or other products of interdiffusion between the plug and the wetting layer. First, an optional barrier layer is created by covering the bottom of a hole with a film containing titanium nitride doped with silicon. Second, a wetting layer is created by covering the side walls of a hole with a film containing titanium doped with silicon, in a Ti:Si molar ratio greater than 1:2. Preferably, the wetting layer is created by sputter deposition using a titanium sputtering target containing 0.1% to 20% wt silicon, most preferably 5% to 10% wt silicon. Third, the hole is filled by depositing a material consisting primarily of aluminum. The hole preferably is filled by sputter deposition using an aluminum sputtering target, optionally containing dopants such as copper.Type: GrantFiled: March 18, 1997Date of Patent: June 8, 1999Assignee: Applied Materials, Inc.Inventors: Gongda Yao, Peijun Ding, Zheng Xu, Hoa Kieu
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Patent number: 5847461Abstract: A process and resulting structure are described for using a metal layer formed over an insulating layer as both the filler material to fill openings in the insulating layer and as the patterned metal interconnect or wiring harness on the surface of the insulating layer. The process includes the steps of forming a compressively stressed metal layer over an insulating layer having previously formed openings therethrough to the material under the insulating layer; forming a high tensile strength cap layer of material over the compressively stressed metal layer; and then heating the structure to a temperature sufficient to cause the compressively stressed metal layer to extrude down into the openings in the underlying insulating layer. The overlying cap layer has sufficient tensile strength to prevent or inhibit the compressive stressed metal layer from extruding upwardly to form hillocks which would need to be removed, i.e., by planarization.Type: GrantFiled: June 17, 1996Date of Patent: December 8, 1998Assignee: Applied Materials, Inc.Inventors: Zheng Xu, Tse-Yong Yao, Hoa Kieu, Julio Aranovich
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Patent number: 5780357Abstract: A method and apparatus for depositing material to conformally cover or fill holes within the surface of a semiconductor substrate. The preferred method includes the steps of coherently depositing a first thickness of the material onto the surface of the substrate; reverse sputtering the deposited material so as to coat the sidewalls of the contact holes with the deposited material; after the first thickness of the material is deposited onto the surface of the substrate, depositing a second thickness of the material onto the surface of the substrate; and while depositing the second thickness of the material onto the surface of the substrate, heating the substrate to enhance reflow of the material being deposited.Type: GrantFiled: June 2, 1997Date of Patent: July 14, 1998Assignee: Applied Materials, Inc.Inventors: Zheng Xu, Hoa Kieu
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Patent number: 5668055Abstract: A process and resulting structure are described for using a metal layer formed over an insulating layer as both the filler material to fill openings in the insulating layer and as the patterned metal interconnect or wiring harness on the surface of the insulating layer. The process includes the steps of forming a compressively stressed metal layer over an insulating layer having previously formed openings therethrough to the material under the insulating layer; forming a high tensile strength cap layer of material over the compressively stressed metal layer; and then heating the structure to a temperature sufficient to cause the compressively stressed metal layer to extrude down into the openings in the underlying insulating layer. The overlying cap layer has sufficient tensile strength to prevent or inhibit the compressive stressed metal layer from extruding upwardly to form hillocks which would need to be removed, i.e., by planarization.Type: GrantFiled: May 5, 1995Date of Patent: September 16, 1997Assignee: Applied Materials, Inc.Inventors: Zheng Xu, Tse-Yong Yao, Hoa Kieu, Julio Aranovich