Patents by Inventor Hoe-Yong Kim

Hoe-Yong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8883579
    Abstract: A method of fabricating an array substrate for an organic electroluminescent display device includes forming a semiconductor layer, a semiconductor dummy pattern, a first storage electrode and a first gate insulating layer on a substrate; forming a second gate insulating layer on the semiconductor layer and the first storage electrode; forming a gate electrode and a second storage electrode on the second gate insulating layer; forming ohmic contact layers by doping impurities into both sides of the semiconductor layer; forming an inter insulating layer on the gate electrode and the second storage electrode; forming source and drain electrodes and a third storage electrode on the inter insulating layer; forming a passivation layer on the source and drain electrodes and the third storage electrode; forming a first electrode and a fourth storage electrode on the passivation layer; and forming a spacer and a bank on the first electrode.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: November 11, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Hee-Dong Choi, Jin-Chae Jeon, Seung-Joon Jeon, Hoe-Yong Kim
  • Publication number: 20120104399
    Abstract: A method of fabricating an array substrate for an organic electroluminescent display device includes forming a semiconductor layer, a semiconductor dummy pattern, a first storage electrode and a first gate insulating layer on a substrate; forming a second gate insulating layer on the semiconductor layer and the first storage electrode; forming a gate electrode and a second storage electrode on the second gate insulating layer; forming ohmic contact layers by doping impurities into both sides of the semiconductor layer; forming an inter insulating layer on the gate electrode and the second storage electrode; forming source and drain electrodes and a third storage electrode on the inter insulating layer; forming a passivation layer on the source and drain electrodes and the third storage electrode; forming a first electrode and a fourth storage electrode on the passivation layer; and forming a spacer and a bank on the first electrode.
    Type: Application
    Filed: October 31, 2011
    Publication date: May 3, 2012
    Inventors: Hee-Dong CHOI, Jin-Chae Jeon, Seung-Joon Jeon, Hoe-Yong Kim