Patents by Inventor Hokuto Kumagai

Hokuto Kumagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8211718
    Abstract: A semiconductor device having the structure, which is adopted for the highly precise visual inspection with a lower cost, is achieved. A semiconductor device is a semiconductor device having a region for forming an electric circuit, and includes seal rings provided in an interconnect layer and surrounding the region for forming an electric circuit, and a dummy metal via provided in the interconnect layer and located outside of the seal rings. In a cross section perpendicular to an elongating direction of the seal ring, the width of the dummy metal via is smaller than the width of the seal ring.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: July 3, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hokuto Kumagai
  • Publication number: 20110141268
    Abstract: A semiconductor device having the structure, which is adopted for the highly precise visual inspection with a lower cost, is achieved. A semiconductor device is a semiconductor device having a region for forming an electric circuit, and includes seal rings provided in an interconnect layer and surrounding the region for forming an electric circuit, and a dummy metal via provided in the interconnect layer and located outside of the seal rings. In a cross section perpendicular to an elongating direction of the seal ring, the width of the dummy metal via is smaller than the width of the seal ring.
    Type: Application
    Filed: February 18, 2011
    Publication date: June 16, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Hokuto KUMAGAI
  • Patent number: 7919869
    Abstract: A semiconductor device having the structure, which is adopted for the highly precise visual inspection with a lower cost, is achieved. A semiconductor device is a semiconductor device having a region for forming an electric circuit, and includes seal rings provided in an interconnect layer and surrounding the region for forming an electric circuit, and a dummy metal via provided in the interconnect layer and located outside of the seal rings. In a cross section perpendicular to an elongating direction of the seal ring, the width of the dummy metal via is smaller than the width of the seal ring.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: April 5, 2011
    Assignee: NEC Corporation
    Inventor: Hokuto Kumagai
  • Patent number: 7777341
    Abstract: A semiconductor device includes a seal ring formed on an outer circumference of an element forming region when seen from the top in a multilayer interconnect structure formed on a silicon layer, and dummy metal structures formed on a further outer circumference of the seal ring. The more inner circumference side the dummy interconnect is formed on, the more upper layer the dummy interconnect is arranged on.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: August 17, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Hokuto Kumagai
  • Publication number: 20100127357
    Abstract: A semiconductor device includes a seal ring formed on an outer circumference of an element forming region when seen from the top in a multilayer interconnect structure formed on a silicon layer, and dummy metal structures formed on a further outer circumference of the seal ring. The more inner circumference side the dummy interconnect is formed on, the more upper layer the dummy interconnect is arranged on.
    Type: Application
    Filed: December 19, 2008
    Publication date: May 27, 2010
    Applicant: NEC Electronic Corporation
    Inventor: Hokuto Kumagai
  • Patent number: 7498660
    Abstract: A semiconductor device includes a seal ring formed on an outer circumference of an element forming region when seen from the top in a multilayer interconnect structure formed on a silicon layer, and dummy metal structures formed on a further outer circumference of the seal ring. The more inner circumference side the dummy interconnect is formed on, the more upper layer the dummy interconnect is arranged on.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: March 3, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Hokuto Kumagai
  • Publication number: 20080211109
    Abstract: A semiconductor device having the structure, which is adopted for the highly precise visual inspection with a lower cost, is achieved. A semiconductor device is a semiconductor device having a region for forming an electric circuit, and includes seal rings provided in an interconnect layer and surrounding the region for forming an electric circuit, and a dummy metal via provided in the interconnect layer and located outside of the seal rings. In a cross section perpendicular to an elongating direction of the seal ring, the width of the dummy metal via is smaller than the width of the seal ring.
    Type: Application
    Filed: March 3, 2008
    Publication date: September 4, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hokuto KUMAGAI
  • Publication number: 20080067690
    Abstract: A semiconductor device includes a seal ring formed on an outer circumference of an element forming region when seen from the top in a multilayer interconnect structure formed on a silicon layer, and dummy metal structures formed on a further outer circumference of the seal ring. The more inner circumference side the dummy interconnect is formed on, the more upper layer the dummy interconnect is arranged on.
    Type: Application
    Filed: August 24, 2007
    Publication date: March 20, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hokuto KUMAGAI
  • Publication number: 20070232030
    Abstract: In a method for processing a semiconductor wafer, having a plurality of solder bumps bonded on a front surface thereof, a fluid-like layer is formed on the front surface of the semiconductor wafer. A holder sheet is prepared, and has a support layer, and an adhesive layer formed on a surface of the support layer and exhibiting a fluidness. The fluid-like layer is covered with the holder sheet such that the adhesive layer of the holder sheet is rested on a surface of the fluid-like layer, and the adhesive layer of the holder sheet is transformable so as to conform with a configuration of the surface of the fluid-like layer due to the fluidness of the adhesive layer of the holder sheet. A rear surface of the semiconductor wafer is mechanically ground so that the thickness of the semiconductor wafer is reduced to a target value. The holder sheet is peeled from the surface of the fluid-like layer.
    Type: Application
    Filed: March 26, 2007
    Publication date: October 4, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hokuto Kumagai